会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Area and power efficient VLIW processor with improved speed
    • 面积和功率高效的VLIW处理器具有改进的速度
    • US07100022B1
    • 2006-08-29
    • US10085724
    • 2002-02-28
    • Moataz MohamedJohn SpenceKevin R. BowlesChien-Wei Li
    • Moataz MohamedJohn SpenceKevin R. BowlesChien-Wei Li
    • G06F15/16G06F15/00
    • G06F9/3885G06F9/3012G06F9/30141G06F9/3824G06F9/3828G06F9/3853
    • In one embodiment, move buses utilized in presently known VLIW processors are eliminated and replaced with a busing scheme which results in transfer of operands from each register file bank to any data path block while also reducing the total bus width and total power consumption associated with transport of operands from register file banks to data path blocks. According to this busing scheme, the speed of VLIW processor is also improved since the need for one clock cycle to move operands from one register file bank to another is overcome. In another embodiment, a scheduling restriction is used to eliminate the need for the presently required write back buses used by various data path blocks. In yet another embodiment, a scheduling restriction is imposed which results in a reduction of the number of ports, a reduction in the width of buses, and a reduction of power consumption.
    • 在一个实施例中,消除了在当前已知的VLIW处理器中使用的移动总线,并且将其替换为导致将操作数从每个寄存器文件组传送到任何数据路径块的通配方案,同时还减少与传输相关联的总总线宽度和总功率消耗 从寄存器文件库到数据路径块的操作数。 根据这种调用方案,VLIW处理器的速度也得到了提高,因为克服了从一个寄存器文件组到另一个寄存器堆栈将操作数移动到另一个时钟周期的需要。 在另一个实施例中,使用调度限制来消除对各种数据路径块使用的当前所需的回写总线的需要。 在另一个实施例中,施加调度限制,这导致端口数量的减少,总线宽度的减小以及功耗的降低。
    • 3. 发明授权
    • Methods, systems, and computer program products for translating machine code associated with a first processor for execution on a second processor
    • 用于翻译与第一处理器相关联的机器代码以在第二处理器上执行的方法,系统和计算机程序产品
    • US07266811B2
    • 2007-09-04
    • US09946877
    • 2001-09-05
    • Moataz MohamedKeith BindlossWade Guthrie
    • Moataz MohamedKeith BindlossWade Guthrie
    • G06F9/45G06F15/00
    • G06F9/30174G06F8/52G06F9/3824G06F9/3836G06F9/3885
    • Embodiments of systems, methods, and computer program products may facilitate translation of machine code associated with a first processor for execution on a second processor. Machine code associated with a first processor may be translated into a translated program that includes one or more translation instructions for execution on the second processor. The one or more translation instructions are used exclusively to translate machine code that is associated with a processor other than the second processor. The translated program may be stored in a storage medium where it may be executed using the second processor. Each translation instruction that involves access of the storage medium may be dispatched to one or more translation load-store units that are dedicated exclusively to processing the translation instructions. By translating machine code associated with a first processor into one or more translation instructions that are compatible with a second processor architecture, the second processor may execute both the translated program and programs compiled for execution on the second processor at the same time and would not have to run in separate modes (e.g., a translation mode and a non-translation mode).
    • 系统,方法和计算机程序产品的实施例可以促进与第一处理器相关联的机器代码的转换,以在第二处理器上执行。 与第一处理器相关联的机器码可以被翻译成包括用于在第二处理器上执行的一个或多个转换指令的翻译程序。 一个或多个翻译指令专门用于翻译与除第二处理器之外的处理器相关联的机器代码。 翻译后的程序可以存储在可以使用第二处理器执行的存储介质中。 涉及存储介质访问的每个翻译指令可以被分派到专门专门用于处理翻译指令的一个或多个翻译加载存储单元。 通过将与第一处理器相关联的机器码转换为与第二处理器架构兼容的一个或多个转换指令,第二处理器可以同时执行编译为在第二处理器上执行的翻译程序和程序,并且不会 以单独的模式运行(例如,翻译模式和非翻译模式)。