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1. 发明申请

US20060072686A1 Method and circuit arrangement for suppressing an orthogonal perturbation 失效
标题翻译：用于抑制正交扰动的方法和电路装置
公开(公告)号：US20060072686A1
公开(公告)日：2006-04-06
申请号：US11243489
申请日：2005-10-04
申请人： Ingo Steinbach , Hans Fiesel , Miodrag Temerinac
发明人： Ingo Steinbach , Hans Fiesel , Miodrag Temerinac
IPC分类号： H04L27/22
CPC分类号： H03D1/2245
摘要： The invention relates to a method as well as a circuit arrangement for suppression of a perturbing quadrature component of a carrier signal of an amplitude-modulated signal during the recovery of the carrier signal in a synchronous demodulator, which outputs a quadrature signal (Q). The perturbing quadrature component of the carrier signal is estimated and the estimated quadrature component is subtracted from the quadrature signal (Q).
摘要翻译：本发明涉及一种方法以及用于在同步解调器中恢复载波信号期间抑制幅度调制信号的载波信号的扰动正交分量的电路装置，其输出正交信号（Q）。估计载波信号的扰动正交分量，并从正交信号（Q）中减去估计的正交分量。

2. 发明授权

US06754468B1 Local communications device 失效
标题翻译：本地通信设备
公开(公告)号：US06754468B1
公开(公告)日：2004-06-22
申请号：US09302391
申请日：1999-04-30
申请人： Ulrich Sieben , Miodrag Temerinac
发明人： Ulrich Sieben , Miodrag Temerinac
IPC分类号： H04B700
CPC分类号： H04M1/7253
摘要： A Portable communications device (1), particularly as an additional functional unit in a radiotelephone (100), comprising an input, output radio interface (2) for local data exchange between two adjacent communications devices (1; 100) or between a communications device (1; 100) and a data processing device (12) adapted to the,local data exchange, or a data-reproducing device (13), or an adapted data source (50). The range (r) of the input/output radio interface (2) is short compared with the range of a conventional radio interface for data :transfer, and corresponds essentially to a talking distance. The communications device (1, 100) further includes a memory device (6) and a data processing device (5). Different data sequences are identified and selectively retrievable in the memory device (6). The activation of the input/output radio interface (2) can be initiated manually.
摘要翻译：一种便携式通信设备（1），特别是作为无线电话（100）中的附加功能单元，包括用于两个相邻通信设备（1; 100）之间或通信设备之间的本地数据交换的输入，输出无线电接口（2）（1; 100）和适于本地数据交换的数据处理设备（12）或数据再现设备（13）或适配的数据源（50）。输入/输出无线电接口（2）的范围（r）与用于数据的传统无线电接口的范围相比较短：传输，并且基本上对应于通话距离。通信设备（1,100）还包括存储设备（6）和数据处理设备（5）。在存储器件（6）中识别并选择性地检索不同的数据序列。可以手动启动输入/输出无线电接口（2）的激活。

3. 发明授权

US07797361B2 System and method for generating random numbers using parity feedback 有权
标题翻译：使用奇偶校验反馈产生随机数的系统和方法
公开(公告)号：US07797361B2
公开(公告)日：2010-09-14
申请号：US11238158
申请日：2005-09-28
申请人： Dejan Lazich , Herbert Alrutz , Miodrag Temerinac , Steffen Schober
发明人： Dejan Lazich , Herbert Alrutz , Miodrag Temerinac , Steffen Schober
IPC分类号： G06F7/58 , H03B29/00
CPC分类号： H04L9/0861 , G06F7/588 , H03K3/84
摘要： A method for generating random numbers in which oscillating digital output signals of unequal or equal periodicity are generated by at least two ring oscillators, an external parity signal representing a logical state being generated when an odd number of the output signals take on a specified logical state, the external parity signal being fed back to an external parity input of each of the respective ring oscillators. Also, a random number generator having at least two ring oscillators made up of independently freewnning inverter chains with feedback having an odd number of series-connected inverters that generate oscillating digital output signals of unequal or equal periodicity, and having first panty signal generating mechanisms that generate an external parity signal representing a logical state when an odd number of the output signals take on a specified logical state.
摘要翻译：一种用于产生随机数的方法，其中由至少两个环形振荡器产生不等或相等周期的振荡数字输出信号，表示当奇数个输出信号具有指定逻辑状态时产生的逻辑状态的外部奇偶校验信号，外部奇偶校验信号被反馈到每个相应的环形振荡器的外部奇偶校验输入。另外，具有至少两个环形振荡器的随机数发生器，该环形振荡器由具有奇数个串联连接的反相器的反馈链独立地形成，产生具有不等周期或等周期的振荡数字输出信号，并且具有第一内裤信号产生机构，当奇数个输出信号采取指定的逻辑状态时，产生表示逻辑状态的外部奇偶校验信号。

4. 发明授权

US07613989B2 Decoder for executing a Viterbi algorithm 失效
标题翻译：用于执行维特比算法的解码器
公开(公告)号：US07613989B2
公开(公告)日：2009-11-03
申请号：US11199811
申请日：2005-08-09
申请人： Felix Kiefer , Miodrag Temerinac
发明人： Felix Kiefer , Miodrag Temerinac
IPC分类号： H03M13/03
CPC分类号： H03M13/4184 , H03M13/4107 , H03M13/6583
摘要： A Viterbi decoder includes a computing device, a memory and a bus. The computing device receives sets of data values and calculates distances for the received sets of data values, accumulates and compares the calculated distances according to a Viterbi algorithm, decides data values and generates control signals dependent on a plurality of decisions associated with a plurality of paths. The memory stores the decided data values and provides at least one output value. The bus connects the computing device and the memory and is configured to convey the control signals to the path memory. The computing device or the memory shifts data strings in the memory according to conditions of the Viterbi algorithm with the control signals associated with the plurality of paths.
摘要翻译：维特比解码器包括计算设备，存储器和总线。计算设备接收数据值集合并计算接收到的数据值集合的距离，根据维特比算法累积并比较计算出的距离，决定数据值，并根据与多个路径相关联的多个决定生成控制信号。存储器存储所决定的数据值并提供至少一个输出值。总线连接计算设备和存储器，并且被配置为将控制信号传送到路径存储器。计算设备或存储器根据具有与多个路径相关联的控制信号的维特比算法的条件来移动存储器中的数据串。

5. 发明申请

US20060209996A1 Decoder for executing a viterbi algorithm 失效
标题翻译：用于执行维特比算法的解码器
公开(公告)号：US20060209996A1
公开(公告)日：2006-09-21
申请号：US11199811
申请日：2005-08-09
申请人： Felix Kiefer , Miodrag Temerinac
发明人： Felix Kiefer , Miodrag Temerinac
IPC分类号： H03D1/00
CPC分类号： H03M13/4184 , H03M13/4107 , H03M13/6583
摘要： A Viterbi decoder includes a computing device that receives sets of data values and calculates distances from the received data values and accumulates and compares the distances according to a Viterbi algorithm and decides data values. Also included is a path memory for storing decided-upon data values. A bus connects the computing device and the path memory. The computing device generates control signals dependent on the decisions that are associated with paths. The bus conveys the control signals to the path memory. The computing device and/or the path memory shifts data strings with the control signals associated with the paths in the path memory according to conditions of the Viterbi algorithm. The path memory provides at least one output value. The computing device evaluates the requisite distances, for example all distances required for each set of received values (e.g., in one module), and accumulates and compares the associated distances according to the Viterbi algorithm, where, for example the relatively smallest distances may be selected and stored in a distance memory. The decoder may have a system clock frequency equal to the decoder cycle frequency or the data rate. As such, the number of accumulate-and-compare modules of the computing device are equal to the number of states, for example, paths. The bus width of the bus to the distance memory may be sized for reading and storing the distances for all paths at the same time, with the bus to the path memory carrying all the control signals at the same time.
摘要翻译：维特比解码器包括计算装置，其接收数据值集合并计算距接收数据值的距离，并且根据维特比算法累积并比较距离并且决定数据值。还包括用于存储确定的数据值的路径存储器。总线连接计算设备和路径存储器。计算设备根据与路径相关联的决策产生控制信号。总线将控制信号传送到路径存储器。计算设备和/或路径存储器根据维特比算法的条件，利用与路径存储器中的路径相关联的控制信号来移动数据串。路径存储器提供至少一个输出值。计算设备评估所需的距离，例如每组接收值所需的所有距离（例如，在一个模块中），并根据维特比算法累积和比较相关联的距离，其中例如相对较小的距离可以是选择并存储在距离存储器中。解码器可以具有等于解码器周期频率或数据速率的系统时钟频率。这样，计算设备的累加和比较模块的数量等于状态数量，例如路径。总线到距离存储器的总线宽度的大小可以被设置用于同时读取和存储所有路径的距离，同时总线与路径存储器同时承载所有的控制信号。

6. 发明授权

US07330141B2 Compensation circuit and compensation method to compensate nonlinear distortions of an A/D converter 有权
标题翻译：补偿电路和补偿方法来补偿A / D转换器的非线性失真
公开(公告)号：US07330141B2
公开(公告)日：2008-02-12
申请号：US10779317
申请日：2004-02-13
申请人： Miodrag Temerinac , Norbert Greitschus
发明人： Miodrag Temerinac , Norbert Greitschus
IPC分类号： H03M1/10
CPC分类号： H03M1/1042 , H03M1/12
摘要： The invention relates to a compensation circuit (1–6) to compensate nonlinear distortions of an A/D converter comprising a signal input and a compensation system. In order to avoid the high costs related to the complex analog design of the A/D converter and/or the high energy consumption in this converter and compensation system, it is proposed that a compensation circuit be used that is composed of digital circuit elements that are connected following the A/D converter and which has a nonlinearly distorted output signal of the A/D converter supplied to it to compensate the nonlinear distortion. Adaptive coefficients are preferably employed here for the compensation.
摘要翻译：本发明涉及一种用于补偿包括信号输入和补偿系统的A / D转换器的非线性失真的补偿电路（1-6）。为了避免与A / D转换器的复杂模拟设计相关的高成本和/或该转换器和补偿系统中的高能耗，建议使用由数字电路元件组成的补偿电路，被连接在A / D转换器之后，并且具有提供给它的A / D转换器的非线性失真输出信号以补偿非线性失真。这里优选采用自适应系数进行补偿。

7. 发明申请

US20060018408A1 Method and circuit for generating an auxiliary symbol for adjusting a maq demodulator 失效
标题翻译：用于产生用于调整maq解调器的辅助符号的方法和电路
公开(公告)号：US20060018408A1
公开(公告)日：2006-01-26
申请号：US10532554
申请日：2003-10-08
申请人： Christian Bock , Carsten Noeske , Miodrag Temerinac
发明人： Christian Bock , Carsten Noeske , Miodrag Temerinac
IPC分类号： H03D3/00
CPC分类号： H04L7/0062 , H04L27/38 , H04L2027/0067
摘要： In a quadrature amplitude (QAM) demodulator, an auxiliary symbol may be utilized in place of the decision symbol to adjust the decision-feedback loops within the demodulator. For the formation and definition of the auxiliary symbol, the radius and angle information of the received signal or of the preliminary symbol may be used. Through use of the auxiliary symbol instead of the decision symbol, any error in the angle information due to the unknown frequency and phase deviation of the local oscillator may be ignored. An auxiliary symbol generator may be provided which, instead of assigning to the received signal an element from the predetermined symbol alphabet, generates an auxiliary symbol that lies on the most probable one of the nominal radii. Nominal radii may mean those radii on which in QAM the predetermined symbols of the alphabet lie in the plane determined by the quadrature signal pair. For the angle component of the auxiliary symbol, the angle information of the sampled digital signal may be used. In polar coordinates, the auxiliary symbol may thus correspond to the vector intersection point of the sampled digital signal. with the most probable nominal radius.
摘要翻译：在正交幅度（QAM）解调器中，可以使用辅助符号来代替判决符号来调整解调器内的判决反馈环路。对于辅助符号的形成和定义，可以使用接收信号或初步符号的半径和角度信息。通过使用辅助符号而不是决定符号，由于本地振荡器的未知频率和相位偏差导致的角度信息中的任何误差都可能被忽略。可以提供辅助符号发生器，其代替对接收到的信号分配来自预定符号字母表的元素，生成位于最可能的标称半径之一上的辅助符号。标称半径可以表示在QAM中的字母表的预定符号位于由正交信号对确定的平面中的那些半径。对于辅助符号的角度分量，可以使用采样数字信号的角度信息。在极坐标中，辅助符号因此可以对应于采样的数字信号的矢量交点。最可能的名义半径。

8. 发明授权

US06938063B2 Programmable filter architecture 有权
标题翻译：可编程滤波器结构
公开(公告)号：US06938063B2
公开(公告)日：2005-08-30
申请号：US09919579
申请日：2001-07-30
申请人： Miodrag Temerinac
发明人： Miodrag Temerinac
IPC分类号： H03H17/02 , G06F17/10
CPC分类号： H03H17/0294
摘要： A filter (50) with interconnected modular basic units (10) and with a delay line (51), equipped with takeoff points, to furnish delayed sampling values (x1, . . . , xN; xi) of a digital signal (x). Each basic unit (10) contains a programmable weighting device (11, 12), a linkage device (13, 14), and a delay device (15), which delays the data conducted to it by a single period (T) of the sampling clock pulse or by a simple integer multiple thereof. The filter (50) further contains a programmable control device (52), which switches over or switches off a part of the data inputs (16, 17) of the basic unit (10) to achieve forward and/or backward filtering and/or sign inversion and/or a change of the active filter length.
摘要翻译：具有互连的模块化基本单元（10）和配备有起飞点的延迟线（51）的滤波器（50），以提供数字信号（x）的延迟采样值（x 1，...，x N; xi））。每个基本单元（10）包括可编程加权装置（11,12），联动装置（13,14）和延迟装置（15），其将所传送的数据延迟单个周期（T）采样时钟脉冲或其简单整数倍。滤波器（50）还包括可编程控制装置（52），其切换或关闭基本单元（10）的数据输入（16,17）的一部分，以实现正向和/或反向滤波和/或符号反转和/或有源滤波器长度的变化。

9. 发明授权

US07920653B2 Method and circuit arrangement for suppressing an orthogonal perturbation 失效
标题翻译：用于抑制正交扰动的方法和电路装置
公开(公告)号：US07920653B2
公开(公告)日：2011-04-05
申请号：US11243489
申请日：2005-10-04
申请人： Ingo Steinbach , Hans Fiesel , Miodrag Temerinac
发明人： Ingo Steinbach , Hans Fiesel , Miodrag Temerinac
IPC分类号： H03D3/22
CPC分类号： H03D1/2245
摘要： The invention relates to a method as well as a circuit arrangement for suppression of a perturbing quadrature component of a carrier signal of an amplitude-modulated signal during the recovery of the carrier signal in a synchronous demodulator, which outputs a quadrature signal (Q). The perturbing quadrature component of the carrier signal is estimated and the estimated quadrature component is subtracted from the quadrature signal (Q).
摘要翻译：本发明涉及一种方法以及用于在同步解调器中恢复载波信号期间抑制幅度调制信号的载波信号的扰动正交分量的电路装置，其输出正交信号（Q）。估计载波信号的扰动正交分量，并从正交信号（Q）中减去估计的正交分量。

10. 发明授权

US07738599B2 Method and circuit for generating an auxiliary symbol for adjusting a QAM demodulator 失效
标题翻译：用于产生用于调整QAM解调器的辅助符号的方法和电路
公开(公告)号：US07738599B2
公开(公告)日：2010-06-15
申请号：US10532554
申请日：2003-10-08
申请人： Christian Bock , Carsten Noeske , Miodrag Temerinac
发明人： Christian Bock , Carsten Noeske , Miodrag Temerinac
IPC分类号： H03D3/00
CPC分类号： H04L7/0062 , H04L27/38 , H04L2027/0067
摘要： In a quadrature amplitude (QAM) demodulator, an auxiliary symbol may be utilized in place of the decision symbol to adjust the decision-feedback loops within the demodulator. For the formation and definition of the auxiliary symbol, the radius and angle information of the received signal or of the preliminary symbol may be used. Through use of the auxiliary symbol instead of the decision symbol, any error in the angle information due to the unknown frequency and phase deviation of the local oscillator may be ignored. An auxiliary symbol generator may be provided which, instead of assigning to the received signal an element from the predetermined symbol alphabet, generates an auxiliary symbol that lies on the most probable one of the nominal radii. Nominal radii may mean those radii on which in QAM the predetermined symbols of the alphabet lie in the plane determined by the quadrature signal pair. For the angle component of the auxiliary symbol, the angle information of the sampled digital signal may be used. In polar coordinates, the auxiliary symbol may thus correspond to the vector intersection point of the sampled digital signal with the most probable nominal radius.
摘要翻译：在正交幅度（QAM）解调器中，可以使用辅助符号来代替判决符号来调整解调器内的判决反馈环路。对于辅助符号的形成和定义，可以使用接收信号或初步符号的半径和角度信息。通过使用辅助符号而不是决定符号，由于本地振荡器的未知频率和相位偏差导致的角度信息中的任何误差都可能被忽略。可以提供辅助符号发生器，其代替对接收到的信号分配来自预定符号字母表的元素，生成位于最可能的标称半径之一上的辅助符号。标称半径可以表示在QAM中的字母表的预定符号位于由正交信号对确定的平面中的那些半径。对于辅助符号的角度分量，可以使用采样数字信号的角度信息。在极坐标中，辅助符号因此可以对应于具有最可能的标称半径的采样数字信号的矢量交点。

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