发明申请
WO2016057202A1 PROGRAMMING OF DRAIN SIDE WORD LINE TO REDUCE PROGRAM DISTURB AND CHARGE LOSS
审中-公开
基本信息:
- 专利标题： PROGRAMMING OF DRAIN SIDE WORD LINE TO REDUCE PROGRAM DISTURB AND CHARGE LOSS
- 专利标题（中）：排水侧边线编程减少程序干扰和充电损失
- 申请号：PCT/US2015/051275 申请日：2015-09-21
- 公开(公告)号：WO2016057202A1 公开(公告)日：2016-04-14
- 发明人： YUAN, Jiahui , DONG, Yingda , LU, Ching-Huang , ZHAO, Wei
- 申请人： SANDISK TECHNOLOGIES INC.
- 申请人地址： Two Legacy Town Center 6900 North Dallas Parkway Plano, Texas 75024 US
- 专利权人： SANDISK TECHNOLOGIES INC.
- 当前专利权人： SANDISK TECHNOLOGIES INC.
- 当前专利权人地址： Two Legacy Town Center 6900 North Dallas Parkway Plano, Texas 75024 US
- 代理机构： MAGEN, BURT
- 优先权： US14/508,164 20141007
- 主分类号： G11C11/56
- IPC分类号： G11C11/56 ; G11C16/04 ; G11C16/34
摘要：
Techniques are provided for programming the memory cells of a drain-side edge word line of a set of word lines before programming memory cells of any other word line of the set. Pass voltages applied to the other word lines act as stress pulses which redistribute holes in the charge-trapping material of the memory cells of the other word lines to reduce short-term charge loss and downshifting of the threshold voltage. Additionally, one or more initial program voltages used for the drain-side edge word line are relatively low and also act as stress pulses. The memory cells of the drain-side edge word line are programmed to a narrower Vth window than the memory cells of the other word lines. This compensates for a higher level of program disturb of erased state memory cells of the drain-side edge word line due to reduced channel boosting.
摘要（中）：
提供了在编程集合的任何其他字线的存储器单元之前对一组字线集合的漏极边缘字线的存储器单元进行编程的技术。 施加到其它字线的通过电压作为应力脉冲，其重新分配其它字线的存储单元的电荷捕获材料中的空穴，以减少阈值电压的短期电荷损耗和降档。 此外，用于漏极侧边缘字线的一个或多个初始编程电压相对较低并且还用作应力脉冲。 漏极侧边缘字线的存储单元被编程到比其它字线的存储单元窄的Vth窗口。 这由于减少的信道增强而补偿了漏极侧边缘字线的擦除状态存储单元的编程干扰的较高水平。
IPC结构图谱:
| G11C11/56 | 组优先于G11C11/02至G11C11/54中各组。 |