发明申请
WO2016040518A1 HIGH QUALITY FACTOR INDUCTOR AND HIGH QUALITY FACTOR FILTER IN PACKAGE SUBSTRATE OR PRINTED CIRCUIT BOARD (PCB)
审中-公开
基本信息:
- 专利标题： HIGH QUALITY FACTOR INDUCTOR AND HIGH QUALITY FACTOR FILTER IN PACKAGE SUBSTRATE OR PRINTED CIRCUIT BOARD (PCB)
- 专利标题（中）：包装基板或印刷电路板（PCB）中的高质量因子电感器和高品质因子滤波器
- 申请号：PCT/US2015/049238 申请日：2015-09-09
- 公开(公告)号：WO2016040518A1 公开(公告)日：2016-03-17
- 发明人： YOON, Jung Ho , ZHANG, Xiaonan , LEE, Jong-Hoon , SONG, Young Kyu , JOW, Uei-Ming
- 申请人： QUALCOMM INCORPORATED
- 申请人地址： ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714 US
- 专利权人： QUALCOMM INCORPORATED
- 当前专利权人： QUALCOMM INCORPORATED
- 当前专利权人地址： ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714 US
- 代理机构： THAVONEKHAM, S. Sean
- 优先权： US14/484,000 20140911
- 主分类号： H01L23/498
- IPC分类号： H01L23/498 ; H01F17/00 ; H03H7/09 ; H05K1/16
摘要：
A package substrate (or printed circuit board) that includes at least one dielectric layer, a first inductor structure is at least partially located in the dielectric layer, a third interconnect, and a second inductor structure. The first inductor structure includes a first interconnect, a first via coupled to the first interconnect, and a second interconnect coupled to the first via. The third interconnect is coupled to the first inductor structure. The third interconnect is configured to provide an electrical path for a ground signal. The second inductor structure is at least partially located in the dielectric layer. The second inductor is coupled to the third interconnect. The second inductor structure includes a fourth interconnect, a second via coupled to the fourth interconnect, and a fifth interconnect coupled to the second via. The first and second inductor structures are configured to operate with a capacitor as a 3 rd harmonic suppression filter.
摘要（中）：
包括至少一个介电层的封装基板（或印刷电路板），第一电感结构至少部分地位于介电层，第三互连和第二电感结构中。 第一电感器结构包括第一互连，耦合到第一互连的第一通路和耦合到第一通路的第二互连。 第三互连件耦合到第一电感器结构。 第三互连被配置为提供用于接地信号的电路径。 第二电感器结构至少部分地位于电介质层中。 第二电感器耦合到第三互连。 第二电感器结构包括第四互连，耦合到第四互连的第二通路和耦合到第二通路的第五互连。 第一和第二电感器结构被配置为用作为三次谐波抑制滤波器的电容器操作。
IPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L23/00 | 半导体或其他固态器件的零部件 |
| --------H01L23/34 | .冷却装置；加热装置；通风装置或温度补偿装置 |
| ----------H01L23/482 | ..由不可拆卸地施加到半导体本体上的内引线组成的 |
| ------------H01L23/498 | ...引线位于绝缘衬底上的 |