基本信息:
- 专利标题: SLOPE DIE STACK
- 专利标题(中):斜坡堆叠
- 申请号:PCT/CN2012/074255 申请日:2012-04-18
- 公开(公告)号:WO2013155681A1 公开(公告)日:2013-10-24
- 发明人: CHIU, Chin-Tien , YU, Cheeman , LU, Zhong , YU, Fen , WANG, Xu
- 申请人: SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD. , SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD. , CHIU, Chin-Tien , YU, Cheeman , LU, Zhong , YU, Fen , WANG, Xu
- 申请人地址: No. 388 Jiang Chuan East Road Minhang District Shanghai 200241 CN
- 专利权人: SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD.,SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD.,CHIU, Chin-Tien,YU, Cheeman,LU, Zhong,YU, Fen,WANG, Xu
- 当前专利权人: SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD.,SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD.,CHIU, Chin-Tien,YU, Cheeman,LU, Zhong,YU, Fen,WANG, Xu
- 当前专利权人地址: No. 388 Jiang Chuan East Road Minhang District Shanghai 200241 CN
- 代理机构: LIU, SHEN & ASSOCIATES
- 主分类号: H01L25/00
- IPC分类号: H01L25/00
摘要:
A semiconductor device comprises a substrate and at least two groups of semiconductor dies stacked above the substrate. Each group of semiconductor dies includes at least a bottom and a top semiconductor die. Each semiconductor die comprises at least one bonding pad aligned along a first edge of the semiconductor die. The at least two groups of semiconductor dies comprise an underlying group of semiconductor dies and an overlying group of semiconductor dies. The bottom semiconductor die of the underlying group is disposed on the substrate while the bottom semiconductor die of the overlying group is disposed directly on the top semiconductor die of the underlying group. Within each group, the first edge of the top semiconductor die is offset from the first edge of the bottom semiconductor die by a group offset length in a first direction. The first edge of the bottom semiconductor die of the overlying group is shifted from the first edge of the bottom semiconductor die of the underlying group by a shift length Lshift in the first direction. The group offset length Lgoffset of the underlying group is greater than or equal to the shift length Lshift of the overlying group.
摘要(中):
半导体器件包括衬底和堆叠在衬底上的至少两组半导体管芯。 每组半导体管芯至少包括底部和顶部半导体管芯。 每个半导体管芯包括沿着半导体管芯的第一边缘对准的至少一个接合焊盘。 所述至少两组半导体管芯包括下面的半导体管芯组和半导体管芯的上覆组。 下面的组的底部半导体管芯设置在衬底上,而覆盖组的底部半导体管芯直接设置在下面的组的顶部半导体管芯上。 在每个组内,顶部半导体管芯的第一边缘沿着第一方向偏离第一半导体管芯的第一边缘的组偏移长度。 覆盖组的底部半导体管芯的第一边缘从第一方向的移位长度Lshift移位到下层组的底部半导体管芯的第一边缘。 基础组的组偏移长度Lgoffset大于或等于上覆组的移位长度Lshift。
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L25/00 | 由多个单个半导体或其他固态器件组成的组装件 |