发明申请
WO2007112201A9 NON-VOLATILE MEMORY AND METHOD WITH REDUNDANCY DATA BUFFERED IN DATA LATCHES FOR DEFECTIVE LOCATIONS
审中-公开
基本信息:
- 专利标题： NON-VOLATILE MEMORY AND METHOD WITH REDUNDANCY DATA BUFFERED IN DATA LATCHES FOR DEFECTIVE LOCATIONS
- 申请号：PCT/US2007063863 申请日：2007-03-13
- 公开(公告)号：WO2007112201A9 公开(公告)日：2008-11-06
- 发明人： MOOGAT FAROOKH , CERNEA RAUL-ADRIAN , TSAO SHOU-CHANG , TSENG TAI-YUAN
- 申请人： SANDISK CORP , MOOGAT FAROOKH , CERNEA RAUL-ADRIAN , TSAO SHOU-CHANG , TSENG TAI-YUAN
- 专利权人： SANDISK CORP,MOOGAT FAROOKH,CERNEA RAUL-ADRIAN,TSAO SHOU-CHANG,TSENG TAI-YUAN
- 当前专利权人： SANDISK CORP,MOOGAT FAROOKH,CERNEA RAUL-ADRIAN,TSAO SHOU-CHANG,TSENG TAI-YUAN
- 优先权： US38965506 2006-03-24; US38840806 2006-03-24
- 主分类号： G11C29/00
- IPC分类号： G11C29/00 ; G11C16/26
摘要：
A memory has defective locations in its user portion replaceable by redundant locations in a redundant portion. Data latches in the user and redundant portions allow data sensed from or to be written to a memory to be exchanged with a data bus. A defective location latching redundancy scheme assumes the column circuits including data latches for defective columns to be still useable. The data latches for the defective columns are used to buffer corresponding redundant data that are normally accessible from their data latches in the redundant portion. In this way both the user and redundant data are available from the user data latches, and streaming data into or out of the data bus is simplified and performance improved.