基本信息:
- 专利标题: INTERCONNECT STRUCTURE AND METHOD OF FABRICATION OF SAME
- 专利标题(中):互连结构及其制造方法
- 申请号:PCT/US2006013179 申请日:2006-04-07
- 公开(公告)号:WO2006113186A3 公开(公告)日:2008-07-24
- 发明人: YANG CHIH-CHAO , CLEVENGER LAWRENCE A , COWLEY ANDREW P , DALTON TIMOTHY J , YOON MEEYOUNG H
- 申请人: IBM , YANG CHIH-CHAO , CLEVENGER LAWRENCE A , COWLEY ANDREW P , DALTON TIMOTHY J , YOON MEEYOUNG H
- 专利权人: IBM,YANG CHIH-CHAO,CLEVENGER LAWRENCE A,COWLEY ANDREW P,DALTON TIMOTHY J,YOON MEEYOUNG H
- 当前专利权人: IBM,YANG CHIH-CHAO,CLEVENGER LAWRENCE A,COWLEY ANDREW P,DALTON TIMOTHY J,YOON MEEYOUNG H
- 优先权: US10707405 2005-04-15
- 主分类号: H01L21/4763
- IPC分类号: H01L21/4763
摘要:
A damascene wire and method of forming the wire. The method including: forming a mask layer on a top surface of a dielectric layer; forming an opening in the mask layer; forming a trench in the dielectric layer where the dielectric layer is not protected by the mask layer; recessing the sidewalls of the trench under the mask layer; forming a conformal conductive liner on all exposed surface of the trench and the mask layer; filling the trench with a core electrical conductor; removing portions of the conductive liner extending above the top surface of the dielectric layer and removing the mask layer; and forming a conductive cap on a top surface of the core conductor. The structure includes a core conductor clad in a conductive liner and a conductive capping layer in contact with the top surface of the core conductor that is not covered by the conductive liner.
摘要(中):
一种镶嵌线及其形成方法。 该方法包括:在电介质层的顶表面上形成掩模层; 在掩模层中形成开口; 在电介质层中形成沟槽,其中电介质层不被掩模层保护; 使掩模层下方的沟槽的侧壁凹陷; 在沟槽和掩模层的所有暴露表面上形成共形导电衬垫; 用芯电导体填充沟槽; 去除在电介质层的顶表面上方延伸的导电衬垫的部分,并去除掩模层; 以及在所述芯导体的顶表面上形成导电帽。 该结构包括包覆在导电衬垫中的芯导体和与未被导电衬垫覆盖的芯导体的顶表面接触的导电覆盖层。
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
--------H01L21/02 | .半导体器件或其部件的制造或处理 |
----------H01L21/027 | ..未在H01L21/18或H01L21/34组中包含的为进一步的光刻工艺在半导体之上制作掩膜 |
------------H01L21/18 | ...器件有由周期表第Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体,如掺杂材料 |
--------------H01L21/42 | ....用辐射轰击的 |
----------------H01L21/461 | .....改变半导体材料的表面物理特性或形状的,例如腐蚀、抛光、切割 |
------------------H01L21/4763 | ......非绝缘层的沉积,例如绝缘层上的导电层、电阻层;这些层的后处理 |