发明申请
WO01069662A1 GROUP III NITRIDE COMPOUND SEMICONDUCTOR AND METHOD FOR MANUFACTURING THE SAME
审中-公开
基本信息:
- 专利标题: GROUP III NITRIDE COMPOUND SEMICONDUCTOR AND METHOD FOR MANUFACTURING THE SAME
- 专利标题(英):Group iii nitride compound semiconductor and method for manufacturing the same
- 专利标题(中):III类氮化物半导体及其制造方法
- 申请号:PCT/JP2001/001396 申请日:2001-02-23
- 公开(公告)号:WO01069662A1 公开(公告)日:2001-09-20
- 主分类号: H01L21/20
- IPC分类号: H01L21/20 ; H01L21/205 ; H01L33/06 ; H01L33/12 ; H01L33/32 ; H01L33/34 ; H01S5/02 ; H01S5/323 ; H01S5/343 ; C30B29/38 ; H01L33/00
摘要:
A sapphire substrate (1) is etched in a stripe pattern having a width of 10 mu m, an interval of 10 mu m, and a depth of 10 mu m. An AlN buffer layer (2) with a thickness of about 40 nm is formed mainly on the top and bottom surfaces of a step on the substrate (1). A GaN layer (3) is formed by vertical and horizontal epitaxial growth. Thus the step is covered by the buffer layer (21) grown on the top surface of the step by horizontal epitaxy, and therefore the surface is planarized. The threading dislocations in the portion of the GaN layer (3) above the bottom of the step are significantly suppressed compared with the portion thereof above the top of the step.
摘要(中):
将蓝宝石基板(1)以宽度10μm,间隔10μm,深度10μm的条纹图案进行蚀刻。 主要在基板(1)上的台阶的顶表面和底表面上形成厚度约为40nm的AlN缓冲层(2)。 通过垂直和水平外延生长形成GaN层(3)。 因此,通过水平外延在步骤的顶表面上生长的缓冲层(21)覆盖该步骤,因此该表面被平坦化。 与步骤顶部之上的部分相比,步骤底部之上的GaN层(3)部分的穿透位错显着地被抑制。
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
--------H01L21/02 | .半导体器件或其部件的制造或处理 |
----------H01L21/027 | ..未在H01L21/18或H01L21/34组中包含的为进一步的光刻工艺在半导体之上制作掩膜 |
------------H01L21/18 | ...器件有由周期表第Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体,如掺杂材料 |
--------------H01L21/20 | ....半导体材料在基片上的沉积,例如外延生长 |