
基本信息:
- 专利标题: ULTRA LOW DIELECTRIC LAYER
- 申请号:US14871305 申请日:2015-09-30
- 公开(公告)号:US20170092534A1 公开(公告)日:2017-03-30
- 发明人: Robert L. Bruce , Geraud J. Dubois , Gregory Fritz , Teddie P. Magbitang , Hiroyuki Miyazoe , Willi Volksen
- 申请人: International Business Machines Corporation
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L23/528 ; H01L23/532 ; H01L21/02
摘要:
An article may include a structure including a patterned metal on a surface of a substrate, the patterned metal including metal features separated by gaps of an average dimension of less than about 1000 nm. A porous low dielectric constant material having a dielectric value of less than about 2.7 substantially occupies all gaps. An interface between the metal features and the porous low dielectric constant material may include less than about 0.1% by volume of voids. A method may include depositing a filling material including a silicon-based resin having a molecular weight of less than about 30,000 Da and a porogen having a molecular weight greater than about 400 Da onto a structure comprising a patterned metal. The deposited filling material may be subjected to a first thermal treatment to substantially fill all gaps, and subjected to a second thermal treatment and a UV radiation treatment.
公开/授权文献:
- US09773698B2 Method of manufacturing an ultra low dielectric layer 公开/授权日:2017-09-26
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
--------H01L21/67 | .专门适用于在制造或处理过程中处理半导体或电固体器件的装置;专门适合于在半导体或电固体器件或部件的制造或处理过程中处理晶片的装置 |
----------H01L21/71 | ..限定在组H01L21/70中的器件的特殊部件的制造 |
------------H01L21/768 | ...利用互连在器件中的分离元件间传输电流 |