发明申请
US20080099794A1 SEMICONDUCTOR DEVICE COMPRISING NMOS AND PMOS TRANSISTORS WITH EMBEDDED SI/GE MATERIAL FOR CREATING TENSILE AND COMPRESSIVE STRAIN
有权
基本信息:
- 专利标题： SEMICONDUCTOR DEVICE COMPRISING NMOS AND PMOS TRANSISTORS WITH EMBEDDED SI/GE MATERIAL FOR CREATING TENSILE AND COMPRESSIVE STRAIN
- 专利标题（中）：包含用于创建拉伸和压缩应变的嵌入式SI / GE材料的NMOS和PMOS晶体管的半导体器件
- 申请号：US11748902 申请日：2007-05-15
- 公开(公告)号：US20080099794A1 公开(公告)日：2008-05-01
- 发明人： Sven Beyer , Manfred Horstmann , Patrick Press , Wolfgang Buchholtz
- 申请人： Sven Beyer , Manfred Horstmann , Patrick Press , Wolfgang Buchholtz
- 优先权： DE102006051492.0 20061031
- 主分类号： H01L29/04
- IPC分类号： H01L29/04 ; H01L21/8238
摘要：
By forming a substantially continuous and uniform semiconductor alloy in one active region while patterning the semiconductor alloy in a second active region so as to provide a base semiconductor material in a central portion thereof, different types of strain may be induced, while, after providing a corresponding cover layer of the base semiconductor material, well-established process techniques for forming the gate dielectric may be used. In some illustrative embodiments, a substantially self-aligned process is provided in which the gate electrode may be formed on the basis of layer, which has also been used for defining the central portion of the base semiconductor material of one of the active regions. Hence, by using a single semiconductor alloy, the performance of transistors of different conductivity types may be individually enhanced.
摘要（中）：
通过在一个有源区中形成基本上连续且均匀的半导体合金，同时在第二有源区中图案化半导体合金，以便在其中心部分提供基极半导体材料，可以诱发不同类型的应变， 可以使用基底半导体材料的相应的覆盖层，用于形成栅极电介质的完善的工艺技术。 在一些说明性实施例中，提供了基本上自对准的工艺，其中栅电极可以基于层形成，其也已经用于限定一个有源区的基极半导体材料的中心部分。 因此，通过使用单个半导体合金，可以单独提高不同导电类型的晶体管的性能。