基本信息:
- 专利标题: 晶片埋入式電路板結構及其製造方法
- 专利标题(英):Circuit board structure with chip embedded therein and manufacturing method thereof
- 专利标题(中):芯片埋入式电路板结构及其制造方法
- 申请号:TW105128453 申请日:2016-09-02
- 公开(公告)号:TW201813466A 公开(公告)日:2018-04-01
- 发明人: 李建成 , LEE, CHIEN CHENG , 鄭文鋒 , CHENG, WEN FENG , 廖中興 , LIAO, CHUNG HSING
- 申请人: 先豐通訊股份有限公司 , BOARDTEK ELECTRONICS CORPORATION
- 申请人地址: 桃園市
- 专利权人: 先豐通訊股份有限公司,BOARDTEK ELECTRONICS CORPORATION
- 当前专利权人: 先豐通訊股份有限公司,BOARDTEK ELECTRONICS CORPORATION
- 当前专利权人地址: 桃園市
- 代理人: 賴正健; 陳家輝
- 主分类号: H05K1/18
- IPC分类号: H05K1/18 ; H05K3/46
A manufacturing method of circuit board structure with chip embedded therein includes a multi-layer board and at least one power module embedded in the multi-layer board. The power module includes an insulating material, a power unit covered by the insulating material, and a circuit layer formed on a surface of the insulating material. The power unit includes an electrically and thermally conductive carrier and a plurality of power chips. The electrically and thermally conductive carrier has a transmitting portion and a carrying portion perpendicularly connected to the transmitting portion. Each power chip has a first electrode layer and a second electrode layer respectively arranged on two opposite sides thereof. The first electrode layers are fixed on the carrying portion, and are electrically connected to the carrying portion in parallel. The power chips are arranged at one side of the transmitting portion. The circuit layer is electrically connected to the electrically and thermally conductive carriers and the second electrode layers of the power chips, such that the power module can be used to test each power chip via the circuit layer and the electrically and thermally conductive carrier.
公开/授权文献:
- TWI612861B 晶片埋入式電路板結構及其製造方法 公开/授权日:2018-01-21
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H05 | 其他类目不包含的电技术 |
----H05K | 印刷电路;电设备的外壳或结构零部件;电气元件组件的制造 |
------H05K1/00 | 印刷电路 |
--------H05K1/18 | .在结构上与非印制电元件相联接的印刷电路 |