基本信息:
- 专利标题: 多層配線基板及其製造方法
- 专利标题(英):Multilayer wiring substrate and method for manufacturing the same
- 专利标题(中):多层配线基板及其制造方法
- 申请号:TW102106815 申请日:2013-02-27
- 公开(公告)号:TW201347641A 公开(公告)日:2013-11-16
- 发明人: 鈴木健二 , SUZUKI, KENJI
- 申请人: 日本特殊陶業股份有限公司 , NGK SPARK PLUG CO., LTD.
- 专利权人: 日本特殊陶業股份有限公司,NGK SPARK PLUG CO., LTD.
- 当前专利权人: 日本特殊陶業股份有限公司,NGK SPARK PLUG CO., LTD.
- 代理人: 何金塗; 丁國隆
- 优先权: 2012-041851 20120228;2012-266356 20121205
- 主分类号: H05K3/46
- IPC分类号: H05K3/46 ; H05K3/40 ; H05K1/11
A via conductor can be formed directly on a through hole without using a special process for burying an inside of the through hole. A multilayer wiring substrate 1 has a buildup layer 3 and a buildup layer 4 constituted by laminating at least one insulation layer and at least one conductor layer; and a support substrate 21 supporting the buildup layers 3, 4 on an upper surface and a lower surface thereof, and is characterized in that the multilayer wiring substrate 1 has a through hole 24 formed to extend in a direction from an upper side to a lower side of the support substrate 21; a through hole conductor 25 formed in an inner circumferential surface of the through hole 24; a conductor layer 22 formed to cover an opening 241 of an upper side of the through hole 24 and electrically connected with the through hole conductor 25; and a conductor layer 23 formed around an opening 242 of a lower side of the through hole 24 without covering the opening 242 and electrically connected with the through hole conductor 25.
公开/授权文献:
- TWI508640B 多層配線基板及其製造方法 公开/授权日:2015-11-11
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H05 | 其他类目不包含的电技术 |
----H05K | 印刷电路;电设备的外壳或结构零部件;电气元件组件的制造 |
------H05K3/00 | 用于制造印刷电路的设备或方法 |
--------H05K3/46 | .多层电路的制造 |