This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of (a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate (b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; (c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; (d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions (e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions; and (f) etching contact trenches into the source, body contact, and body regions.