基本信息:
- 专利标题： 적층형 반도체 패키지 및 이의 제조 방법
- 专利标题（英）：Package on package and method for manufacturing the same
- 专利标题（中）：包装及其制造方法
- 申请号：KR1020140135819 申请日：2014-10-08
- 公开(公告)号：KR1020160041581A 公开(公告)日：2016-04-18
- 发明人： 박동주 , 박재성 , 김진성 , 윤주훈
- 申请人： 앰코 테크놀로지 코리아 주식회사
- 申请人地址： 광주광역시 북구 앰코로 *** (대촌동)
- 专利权人： 앰코 테크놀로지 코리아 주식회사
- 当前专利权人： 앰코 테크놀로지 코리아 주식회사
- 当前专利权人地址： 광주광역시 북구 앰코로 *** (대촌동)
- 代理人： 한라특허법인(유한)
- 主分类号： H01L23/00
- IPC分类号： H01L23/00 ; H01L23/31 ; H01L23/498
The present invention is a multi-layer semiconductor package to promote the bond line increase and adhesion improves between the stacked semiconductor packages and relates to a production method thereof, more specifically to the lower semiconductor package and the interposer by an adhesive member having the conductive particles, and It relates to a production method thereof.
That is, the present invention using the bonding member containing conductive particles lower semiconductor packages and by inter that interposer coupled to challenge the liver so as to at the same time cross-bonding, the lower semiconductor package and the electric signal transfer between the interposer is yirueojim facilitate It is intended to provide a semiconductor package and a method of manufacturing the multi-layer to be made as well as the increase in the bond line and improve bonding force between the lower semiconductor packages and interposers.
公开/授权文献:
- KR101640078B1 적층형 반도체 패키지 및 이의 제조 방법 公开/授权日：2016-07-15
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L23/00 | 半导体或其他固态器件的零部件 |