基本信息:
- 专利标题： 반도체패키지 및 그 제조방법
- 专利标题（英）：Semiconductor package and method for manufacturing the same
- 专利标题（中）：半导体封装及其制造方法
- 申请号：KR1020100052456 申请日：2010-06-03
- 公开(公告)号：KR1020110132874A 公开(公告)日：2011-12-09
- 发明人： 최원 , 윤경로
- 申请人： 삼성전기주식회사
- 申请人地址： Maeyoung-Ro *** (Maetan-Dong), Youngtong-Gu, Suwon-Si, Gyeonggi-Do, Republic of Korea
- 专利权人： 삼성전기주식회사
- 当前专利权人： 삼성전기주식회사
- 当前专利权人地址： Maeyoung-Ro *** (Maetan-Dong), Youngtong-Gu, Suwon-Si, Gyeonggi-Do, Republic of Korea
- 代理人： 특허법인이지
- 主分类号： H01L23/04
- IPC分类号： H01L23/04
摘要：
PURPOSE: A semiconductor package and a manufacturing method thereof are provided to secure a necessary interval between substrates by forming a cavity capable of avoiding the conflict of a semiconductor chip and a substrate. CONSTITUTION: A second substrate(200) which includes first substrate(100) and a core(210) is provided. The core comprises a metal core. The metal core is exposed by eliminating one side of the second substrate as a form corresponding to a semiconductor chip using a laser drill process. The metal core which is exposed is eliminated by etching. A cavity(215) corresponding to the semiconductor chip is formed. A solder bump is laminated on the first substrate. The second substrate is laminated on the first substrate in order to accept the semiconductor chip in the cavity. The semiconductor chip is mounted in the first substrate.
摘要（中）：
目的：提供半导体封装及其制造方法，以通过形成能够避免半导体芯片和基板的冲突的空腔来确保基板之间的必要间隔。 构成：提供包括第一基板（100）和芯部（210）的第二基板（200）。 芯包括金属芯。 通过使用激光钻孔工艺将对应于半导体芯片的形式除去第二基板的一侧来暴露金属芯。 通过蚀刻消除暴露的金属芯。 形成对应于半导体芯片的空腔（215）。 在第一基板上层叠焊料凸块。 为了接受空腔中的半导体芯片，将第二基板层叠在第一基板上。 半导体芯片安装在第一基板中。
公开/授权文献:
- KR101150489B1 반도체패키지 및 그 제조방법 公开/授权日：2012-05-31