基本信息:
- 专利标题： 집적회로 칩 및 이의 제조방법과 집적회로 칩을 구비하는 플립 칩 패키지 및 이의 제조방법
- 专利标题（英）：Integrated circuit chip and method of manufacturing the same and flip chip package having the integrated chip and method of manufacturing the same
- 专利标题（中）：集成电路芯片及其制造方法和具有集成芯片的片式芯片包装及其制造方法
- 申请号：KR1020090093968 申请日：2009-10-01
- 公开(公告)号：KR1020110036354A 公开(公告)日：2011-04-07
- 发明人： 박진우 , 안은철 , 신동길 , 강선원 , 이종호
- 申请人： 삼성전자주식회사
- 申请人地址： ***, Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, Republic of Korea
- 专利权人： 삼성전자주식회사
- 当前专利权人： 삼성전자주식회사
- 当前专利权人地址： ***, Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, Republic of Korea
- 代理人： 박영우
- 主分类号： H01L23/00
- IPC分类号： H01L23/00 ; H01L23/498
摘要：
PURPOSE: An integrated circuit chip, integrated circuit chip manufacturing method, flip chip package with the integrated circuit chip and flip chip package manufacturing method are provided to separate a second bump structure from the central line of a wiring line as much as a fixed distance, thereby preventing stress from being concentrated on the wiring line. CONSTITUTION: An integrated circuit structure comprises a first area with a wiring line and a second area without a wiring line. The integrated circuit structure comprises a plurality of conductive structures and a wiring line(116). An electrode pad comprises a first electrode pad and a second electrode pad(114b). A passivation layer pattern comprises a first opening and a second opening and is arranged on the electrode pad. A bump structure comprises a first bump structure and a second bump structure(130).
摘要（中）：
目的：提供集成电路芯片，集成电路芯片制造方法，具有集成电路芯片和倒装芯片封装制造方法的倒装芯片封装，以将多个第二凸块结构与布线的中心线分开多达固定距离， 从而防止应力集中在布线上。 构成：集成电路结构包括具有布线的第一区域和没有布线的第二区域。 集成电路结构包括多个导电结构和布线（116）。 电极焊盘包括第一电极焊盘和第二电极焊盘（114b）。 钝化层图案包括第一开口和第二开口，并且布置在电极焊盘上。 凸块结构包括第一凸块结构和第二凸块结构（130）。
公开/授权文献:
- KR101652386B1 집적회로 칩 및 이의 제조방법과 집적회로 칩을 구비하는 플립 칩 패키지 및 이의 제조방법 公开/授权日：2016-09-12
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L23/00 | 半导体或其他固态器件的零部件 |