基本信息:
- 专利标题： 로직 상태 포착 회로
- 专利标题（英）：Logic state catching circuits
- 专利标题（中）：逻辑状态捕捉电路
- 申请号：KR1020107001710 申请日：2008-06-26
- 公开(公告)号：KR1020100112108A 公开(公告)日：2010-10-18
- 发明人： 게,샤오핑 , 차이,치아밍 , 피셔,제프리허버트
- 申请人： 퀄컴 인코포레이티드
- 申请人地址： **** Morehouse Drive, San Diego, CA *****-****, U.S.A.
- 专利权人： 퀄컴 인코포레이티드
- 当前专利权人： 퀄컴 인코포레이티드
- 当前专利权人地址： **** Morehouse Drive, San Diego, CA *****-****, U.S.A.
- 代理人： 남상선
- 国际申请： PCT/US2008/068395 2008-06-26
- 国际公布： WO2009003120 2008-12-31
- 主分类号： H03K5/1534
- IPC分类号： H03K5/1534 ; G01R29/027
The first input unit 210, the second input unit 232, and output a plurality of logic state acquisition circuit using a logic circuit 204 having parts 200 are provided. Logic circuit 204 is configured to respond to the change of state of the first data coupled to the input unit 210, a value, causing the central value of the data value produced on the output unit 212. The second input unit 232 is a data value of wihang to hold a representative value, the output portion after the return to their initial state receives a latched version of the data value. Latching element 206 is configured to couple to a latched version of the data value by latching the data values data values in response, and to the change of state of the second input unit (232). A reset element 208 is configured for resetting the latching element 206 in response to a state change of the clock input unit 230.
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H03 | 基本电子电路 |
| ----H03K | 脉冲技术 |
| ------H03K5/00 | 本小类中一个其他大组不包含的脉冲处理 |
| --------H03K5/003 | .变更直流电平 |
| ----------H03K5/1534 | ..过渡期或边沿检测器 |