基本信息:
- 专利标题: 반도체소자의제조방법
- 专利标题(英):Method for manufacturing semiconductor device
- 申请号:KR1019950066164 申请日:1995-12-29
- 公开(公告)号:KR100367499B1 公开(公告)日:2003-03-06
- 发明人: 이승무
- 申请人: 에스케이하이닉스 주식회사
- 申请人地址: 경기도 이천시 부발읍 경충대로 ****
- 专利权人: 에스케이하이닉스 주식회사
- 当前专利权人: 에스케이하이닉스 주식회사
- 当前专利权人地址: 경기도 이천시 부발읍 경충대로 ****
- 代理人: 이후동; 이정훈
- 主分类号: H01L21/28
- IPC分类号: H01L21/28
摘要:
PURPOSE: A method for manufacturing a semiconductor device is provided to prevent collapse of a via hole pattern and to improve gap-filling property by using a SiH4-H2O2 oxide layer having good step coverage. CONSTITUTION: The first metal line(2) is formed on an interlayer dielectric(1). An IMD(Inter-Metal Dielectric) is formed on the first metal line(2). At this time, The IMD is sequentially stacked on the first, second and third oxide layer(3,4,5), wherein the first and third oxide layer(3,5) are made of high density plasma oxide, and the second oxide layer(4) is composed of SiH4-H2O2 oxide. After stabilizing the IMD using annealing, a via contact hole is formed. Then, the second metal line is formed to connect the first metal line(2) through the via contact hole.
公开/授权文献:
- KR1019970052473A 반도체소자의제조방법 公开/授权日:1997-07-29
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
--------H01L21/02 | .半导体器件或其部件的制造或处理 |
----------H01L21/027 | ..未在H01L21/18或H01L21/34组中包含的为进一步的光刻工艺在半导体之上制作掩膜 |
------------H01L21/18 | ...器件有由周期表第Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体,如掺杂材料 |
--------------H01L21/28 | ....用H01L21/20至H01L21/268各组不包含的方法或设备在半导体材料上制造电极的 |