基本信息:
- 专利标题: Manufacturing method and manufacturing apparatus of layered film
- 专利标题(中):层状膜的制造方法和制造装置
- 申请号:JP2012136997 申请日:2012-06-18
- 公开(公告)号:JP2014003135A 公开(公告)日:2014-01-09
- 发明人: KAWAUCHI MASAAKI , ONISHI SHINJI , KATAYAMA MASAYUKI
- 申请人: Denso Corp , 株式会社デンソー
- 专利权人: Denso Corp,株式会社デンソー
- 当前专利权人: Denso Corp,株式会社デンソー
- 优先权: JP2012136997 2012-06-18
- 主分类号: H01L21/31
- IPC分类号: H01L21/31 ; C23C16/04 ; H01L21/312 ; H01L21/316 ; H01L51/50 ; H05B33/04 ; H05B33/10
摘要:
PROBLEM TO BE SOLVED: To allow a change in a deposition range of each film which composes a layered film by using the same mask when performing deposition of the layered film by gas supply.SOLUTION: A manufacturing method of a layered film comprises: preparing a substrate 6 on which a semiconductor element is formed and preparing a mask 5; and aligning the mask 5 and the substrate 6 in a deposition chamber. During deposition of the layered film 8, a clearance between the mask 5 and the substrate 6 is varied by supplying currents A1, A2 of current values having magnitudes different from each other from a current supply part to an electromagnet 4 in each of formation processes of first and second barrier layers 8a, 8b. That is, by differentiating the magnitudes of the currents A1, A2 supplied to the electromagnet 4, a magnetic attractive force of the electromagnet 4 varies and a pressure for deforming a deposition range variable part 7 by the mask 5 varies and contact pressure between the deposition range variable part 7 and the substrate 6 varies.
摘要(中):
要解决的问题:通过使用相同的掩模,通过气体供给来实现层叠膜的沉积,允许构成层叠膜的各膜的成膜范围的变化。解决方案:层叠膜的制造方法包括: 在其上形成半导体元件的衬底6并制备掩模5; 并且在沉积室中对准掩模5和基板6。 在层叠膜8的沉积期间,通过将电流值A1,A2从电流供应部分提供到电磁体4的电流值A1,A2中,在掩模5和基板6之间的间隙, 第一和第二阻挡层8a,8b。 也就是说,通过区分提供给电磁体4的电流A1,A2的大小,电磁体4的吸引力变化,并且由掩模5使沉积范围可变部分7变形的压力发生变化并且接触压力 范围可变部分7和基板6变化。
公开/授权文献:
- JP5803822B2 積層膜の製造方法および製造装置 公开/授权日:2015-11-04
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
--------H01L21/02 | .半导体器件或其部件的制造或处理 |
----------H01L21/027 | ..未在H01L21/18或H01L21/34组中包含的为进一步的光刻工艺在半导体之上制作掩膜 |
------------H01L21/18 | ...器件有由周期表第Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体,如掺杂材料 |
--------------H01L21/26 | ....用波或粒子辐射轰击的 |
----------------H01L21/31 | .....在半导体材料上形成绝缘层的,例如用于掩膜的或应用光刻技术的;以及这些层的后处理;这些层的材料的选择 |