基本信息:
- 专利标题: Method for producing optical semiconductor device
- 专利标题(中):用于制造光学半导体器件的方法
- 申请号:JP2011106477 申请日:2011-05-11
- 公开(公告)号:JP2012237861A 公开(公告)日:2012-12-06
- 发明人: KOBAYASHI HIROHIKO
- 申请人: Sumitomo Electric Ind Ltd , 住友電気工業株式会社
- 专利权人: Sumitomo Electric Ind Ltd,住友電気工業株式会社
- 当前专利权人: Sumitomo Electric Ind Ltd,住友電気工業株式会社
- 优先权: JP2011106477 2011-05-11
- 主分类号: G02F1/025
- IPC分类号: G02F1/025 ; G02B6/13 ; H01S5/22
摘要:
PROBLEM TO BE SOLVED: To provide a method for producing an optical semiconductor device, by which timing for stopping etching of a resin or a resist on a projection part such as a ridge shape or a mesa shape can be easily and accurately determined.SOLUTION: The method for producing an optical semiconductor device comprises producing an optical modulator that guides light in an optical waveguide interposed between a pair of grooves, and the method includes the steps of: forming a plurality of pairs of evaluation grooves 31a, 31b in an evaluation region (TEG (test element group) region) set on a wafer 16; applying a resin layer 13 on the wafer 16; etching the resin layer 13 to expose a top of the optical waveguide; and forming an electrode on the optical waveguide. The width of the plurality of pairs of evaluation grooves 31a, 31b in the evaluation region differs by each pair, and in the exposure step, a top of a region 33 interposed by at least one pair of evaluation grooves 31a, 31b in the evaluation region is exposed by etching.
摘要(中):
解决的问题:为了提供一种光学半导体装置的制造方法,通过该方法可以容易且精确地确定在诸如脊形或台面形状的突起部分上停止树脂或抗蚀剂的蚀刻的定时 。 解决方案:用于制造光学半导体器件的方法包括:制造光导体,该光学调制器将介于一对沟槽之间的光波导中的光引导,并且该方法包括以下步骤:形成多对评估槽31a, 31b在设置在晶片16上的评价区域(TEG(测试元件组)区域)中; 将树脂层13施加在晶片16上; 蚀刻树脂层13以暴露光波导的顶部; 并在光波导上形成电极。 评价区域中的多对评价槽31a,31b的宽度各自不同,在曝光步骤中,在评价区域中至少一对评价槽31a,31b插入的区域33的顶部 通过蚀刻曝光。 版权所有(C)2013,JPO&INPIT
公开/授权文献:
- JP5760667B2 光半導体デバイスの製造方法 公开/授权日:2015-08-12