基本信息:
- 专利标题： Method of manufacturing crystal wafer
- 专利标题（中）：制造晶体波的方法
- 申请号：JP2011055577 申请日：2011-03-14
- 公开(公告)号：JP2011139532A 公开(公告)日：2011-07-14
- 发明人： MURAKAMI SHIRO , KOMINE KENJI
- 申请人： Epson Toyocom Corp , エプソントヨコム株式会社
- 专利权人： Epson Toyocom Corp,エプソントヨコム株式会社
- 当前专利权人： Epson Toyocom Corp,エプソントヨコム株式会社
- 优先权： JP2011055577 2011-03-14
- 主分类号： H03H9/19
- IPC分类号： H03H9/19 ; H01L41/09 ; H01L41/18 ; H01L41/22 ; H01L41/23 ; H01L41/332 ; H01L41/335 ; H03H3/02
摘要：
PROBLEM TO BE SOLVED: To provide a piezoelectric wafer and piezoelectric device in which, even when a piezoelectric substrate is formed by etching the piezoelectric wafer, a shape of the piezoelectric substrate is maintained and the piezoelectric substrate can be easily folded away from a piezoelectric wafer body. SOLUTION: In a piezoelectric wafer 10, a piezoelectric substrate 20, supporting parts 40 and a piezoelectric wafer body 12 are formed by etching. The piezoelectric substrate 20 is connected with the piezoelectric wafer body 12 via a plurality of supporting parts 40. Namely, the supporting parts 40 are connected to an end portion of a face (a proximal end face) 22 provided at a side of a proximal end 26 of the piezoelectric substrate 20. Outer side faces 46 of the supporting parts 40 are then formed continuously along a side face 24 of the piezoelectric substrate 20. Furthermore, on an inner side face 42 of each of the supporting parts 40, a first groove 44 is provided along the proximal end face 22 of the piezoelectric substrate 20. COPYRIGHT: (C)2011,JPO&INPIT
摘要（中）：
解决的问题：为了提供一种压电晶片和压电器件，其中即使当通过蚀刻压电晶片形成压电基板时，保持压电基板的形状，并且压电基板可以容易地从 压电晶片体。 解决方案：在压电晶片10中，通过蚀刻形成压电基板20，支撑部40和压电晶片体12。 压电基板20经由多个支撑部40与压电晶片体12连接。即，支撑部40与设置在基端侧的面（近端面）22的端部连接 然后，沿着压电基板20的侧面24连续地形成支撑部40的外侧面46.此外，在各支撑部40的内侧面42上形成有第一槽 44沿着压电基板20的近端面22设置。版权所有（C）2011，JPO＆INPIT
公开/授权文献:
- JP5152542B2 Method for manufacturing a quartz wafer 公开/授权日：2013-02-27