基本信息:
- 专利标题: Semiconductor device, and method of manufacturing the same
- 专利标题(中):半导体器件及其制造方法
- 申请号:JP2009297630 申请日:2009-12-28
- 公开(公告)号:JP2011138903A 公开(公告)日:2011-07-14
- 发明人: KANETANI HIROYUKI
- 申请人: Toshiba Corp , 株式会社東芝
- 专利权人: Toshiba Corp,株式会社東芝
- 当前专利权人: Toshiba Corp,株式会社東芝
- 优先权: JP2009297630 2009-12-28
- 主分类号: H01L27/105
- IPC分类号: H01L27/105 ; H01L21/8246
摘要:
PROBLEM TO BE SOLVED: To provide a semiconductor device and a method of manufacturing the same which can suppress reduction of an MgO film while improving polarization characteristics of a ferroelectric capacitor.
SOLUTION: The semiconductor device includes a switching transistor 301, first and second diffusion layers 121
1 , 121
2 , an interlayer insulation film 131, the MgO film 141, the ferroelectric capacitor 201 having a lower electrode 211 formed on the MgO film, a ferroelectric film 212, and an upper electrode 213, a first plug 171 formed on the upper electrode 213, a second plug 172 formed on the first diffusion layer, and a third plug 173 formed on the second diffusion layer and electrically conducting the lower electrode 211 and the second diffusion layer. The third plug 173 includes a barrier metal layer 181 for forming a side surface and bottom surface, and a plug material layer 182 formed on the barrier metal layer 181. The barrier metal layer 181 is interposed between the MgO film 141 and the plug material layer 182.
COPYRIGHT: (C)2011,JPO&INPIT
摘要(中):
SOLUTION: The semiconductor device includes a switching transistor 301, first and second diffusion layers 121
1 , 121
2 , an interlayer insulation film 131, the MgO film 141, the ferroelectric capacitor 201 having a lower electrode 211 formed on the MgO film, a ferroelectric film 212, and an upper electrode 213, a first plug 171 formed on the upper electrode 213, a second plug 172 formed on the first diffusion layer, and a third plug 173 formed on the second diffusion layer and electrically conducting the lower electrode 211 and the second diffusion layer. The third plug 173 includes a barrier metal layer 181 for forming a side surface and bottom surface, and a plug material layer 182 formed on the barrier metal layer 181. The barrier metal layer 181 is interposed between the MgO film 141 and the plug material layer 182.
COPYRIGHT: (C)2011,JPO&INPIT
要解决的问题:提供一种可以在提高铁电电容器的极化特性的同时抑制MgO膜的还原的半导体器件及其制造方法。 解决方案:半导体器件包括开关晶体管301,第一和第二扩散层121,第一和第二扩散层121,层间绝缘膜131,MgO膜141, 具有形成在MgO膜上的下电极211,强电介质膜212和上电极213的铁电电容器201,形成在上电极213上的第一插塞171,形成在第一扩散层上的第二插塞172, 第三插头173形成在第二扩散层上并导电下电极211和第二扩散层。 第三插头173包括用于形成侧表面和底表面的阻挡金属层181和形成在阻挡金属层181上的插塞材料层182.阻挡金属层181介于MgO膜141和插塞材料层之间 182.版权所有(C)2011,JPO&INPIT
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L27/00 | 由在一个共用衬底内或其上形成的多个半导体或其他固态组件组成的器件 |
--------H01L27/02 | .包括有专门适用于整流、振荡、放大或切换的半导体组件并且至少有一个电位跃变势垒或者表面势垒的;包括至少有一个跃变势垒或者表面势垒的无源集成电路单元的 |
----------H01L27/04 | ..其衬底为半导体的 |
------------H01L27/06 | ...在非重复结构中包括有多个单个组件的 |
--------------H01L27/105 | ....包含场效应组件的 |