基本信息:
- 专利标题： VERFAHREN ZUR HERSTELLUNG EINER LEITERPLATTE
- 专利标题（英）：Method for producing a circuit board
- 专利标题（中）：一种用于生产电路板
- 申请号：EP15708697.6 申请日：2015-01-21
- 公开(公告)号：EP3100310A1 公开(公告)日：2016-12-07
- 发明人： LANGER, Gregor , DAMEJ, Mario , LUTSCHOUNIG, Ferdinand
- 申请人： AT & S Austria Technologie & Systemtechnik Aktiengesellschaft
- 申请人地址： Fabriksgasse 13 8700 Leoben AT
- 专利权人： AT & S Austria Technologie & Systemtechnik Aktiengesellschaft
- 当前专利权人： AT & S Austria Technologie & Systemtechnik Aktiengesellschaft
- 当前专利权人地址： Fabriksgasse 13 8700 Leoben AT
- 代理机构： Patentanwaltskanzlei Matschnig & Forsthuber OG
- 优先权： AT500582014 20140129
- 国际公布： WO2015113088 20150806
- 主分类号： H01L33/60
- IPC分类号： H01L33/60 ; H05K1/18 ; H05K3/00
摘要：
The invention relates to a method for producing a circuit board comprising at least one cavity for receiving an electronic component, the walls of said cavity having a reflective, in particular specular reflector layer. The method is characterised by the following steps: providing a circuit board (1); applying a temporary protective layer (7) to at least one portion of the surface of the circuit board (1); producing the cavity (9) by penetrating the protective layer (7) in the region of said cavity (9); applying the reflector layer (11); removing the temporary protective layer (7).
摘要（中）：
在去除临时保护层的。
公开/授权文献:
- EP3100310B1 VERFAHREN ZUR HERSTELLUNG EINER LEITERPLATTE 公开/授权日：2021-07-07