基本信息:
- 专利标题： DATA PROCESSOR WITH BRANCH TARGET BUFFER
- 专利标题（中）：随着结目标缓冲区数据处理器
- 申请号：EP01969352.2 申请日：2001-07-06
- 公开(公告)号：EP1305707A1 公开(公告)日：2003-05-02
- 发明人： HOOGERBRUGGE, Jan
- 申请人： Koninklijke Philips Electronics N.V.
- 申请人地址： Groenewoudseweg 1 5621 BA Eindhoven NL
- 专利权人： Koninklijke Philips Electronics N.V.
- 当前专利权人： Koninklijke Philips Electronics N.V.
- 当前专利权人地址： Groenewoudseweg 1 5621 BA Eindhoven NL
- 代理机构： de Jong, Durk Jan
- 优先权： EP00202645 20000721
- 国际公布： WO02008895 20020131
- 主分类号： G06F9/38
- IPC分类号： G06F9/38 ; G06F9/32
摘要：
A data processor comprising contains a branch target memory that stores partial branch target information for instructions. The branch target information is used for advanced determination of the target address of a branch, so that the instruction at the target address can be prefetched. The partial branch target information indicates a position of an expected branch target address in a part of instruction address space defined relative to the current instruction address. Preferably, the relevant part of instruction address space is a page that contains the current instruction address, the partial branch target information providing only the least significant part of the branch target address.
IPC结构图谱:
| G | 物理 |
| --G06 | 计算；推算；计数 |
| ----G06F | 电数字数据处理 |
| ------G06F9/00 | 电数字数据处理的控制单元 |
| --------G06F9/06 | .应用存入的程序的，即应用处理设备的内部存储来接收程序并保持程序的 |
| ----------G06F9/22 | ..微控制或微程序装置 |
| ------------G06F9/38 | ...并行执行指令的，例如，流水线、超前锁定 |