
基本信息:
- 专利标题: A semiconductor integrated circuit and a data processor
- 专利标题(中):半导体集成电路和数据处理器
- 申请号:EP92105324.5 申请日:1992-03-27
- 公开(公告)号:EP0506094A3 公开(公告)日:1994-06-15
- 发明人: Okado, Kazuo , Akojima, Chikara , Kenmoku, Atuko , Sugino, Kimihiro
- 申请人: HITACHI, LTD.
- 申请人地址: 6, Kanda Surugadai 4-chome Chiyoda-ku, Tokyo 101 JP
- 专利权人: HITACHI, LTD.
- 当前专利权人: HITACHI, LTD.
- 当前专利权人地址: 6, Kanda Surugadai 4-chome Chiyoda-ku, Tokyo 101 JP
- 代理机构: Strehl Schübel-Hopf Groening & Partner
- 优先权: JP91155/91 19910329
- 主分类号: G06J1/00
- IPC分类号: G06J1/00 ; H04B3/23
摘要:
In a digital-analog hybrid LSI including an analog circuit (2) and a digital circuit (3), the analog circuit (2) includes a circuit for sampling, according to the operation timing of a switch (4), information to be processed by the analog circuit (2) in a capacitor (5). A clock signal generating means (6) generates an operation reference clock signal (b) for the digital circuit (3) so that the change of the clock signal (b) is stopped at a timing when the switch (4) is opened, i.e., during a specified period (T) which includes the high-to-low transition timing of the clock signal. This prevents the analog characteristic of the analog circuit (3) from being degraded by digital noise that is transferred through the junction capacitance of the semiconductor chip (1).
公开/授权文献:
- EP0506094A2 A semiconductor integrated circuit and a data processor 公开/授权日:1992-09-30