The invention discloses a power semiconductor chip, a sub-module comprising the chip and a crimping-type packaging module. The chip comprises: a terminal area and an effective area arranged inside the terminal area. The effective area is provided therein with an emitting electrode area and a grating electrode area. The grating electrode area comprises a grating electrode, a grating electrode bus, and a plurality of peripheral grating electrodes arranged on the circumference of the grating electrode. The grating electrode is arranged at the center of the peripheral grating electrode surrounding area; and the grating electrode is connected with the peripheral grating electrodes through the grating electrode bus. The peripheral grating electrode surrounding area is divided into a plurality of sub-areas in the same size by the grating electrode bus with emitting electrodes arranged in the sub-areas. Among the peripheral grating electrodes, break points are arranged. The break points are distributed in center symmetrical or axial symmetry. The emitting electrodes inside and outside the peripheral grating electrode surrounding area are communicated with each other via the break points. With the invention, the problem with balanced contact of the interfaces among the sub-modules that can be hardly achieved in the prior art can be realized. The technical problems with complex structure and technology as well as with achieving a high finished product rate can be resolved. In addition, batch production also becomes possible.