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1. 发明申请

WO0079849A9 HIGH PERFORMANCE BALL GRID ARRAY SUBSTRATES 审中-公开
标题翻译：高性能球栅阵列基板
公开(公告)号：WO0079849A9
公开(公告)日：2001-06-21
申请号：PCT/US0015885
申请日：2000-06-09
申请人： ISOLA LAMINATE SYSTEMS CORP
发明人： SMITH GORDON , ANDROFF NANCY M W , HEIN MARC , PETTI MICHAEL A , GOTRO JEFFREY T
IPC分类号： H05K3/00 , H05K3/02 , H05K3/38 , H05K3/46 , H05K1/11 , H01K3/10 , H01R12/04 , H05K3/36
CPC分类号： H05K3/4655 , H05K3/0035 , H05K3/0038 , H05K3/022 , H05K3/025 , H05K3/386 , H05K3/4652 , H05K2201/0195 , H05K2201/0358 , H05K2203/066 , H05K2203/1152
摘要： Electronic substrates and printed circuit boards prepared from the electronic substrate, and more particularly, to methods and apparatuses for providing high density printed circuit substrates.
摘要翻译：从电子基板制备的电子基板和印刷电路板，更具体地说，涉及用于提供高密度印刷电路基板的方法和装置。

2. 发明申请

WO2007076020A3 METHOD AND SYSTEM FOR INCREASING CIRCUITRY INTERCONNECTION AND COMPONENT CAPACITY IN A MULTI-COMPONENT PACKAGE 审中-公开
标题翻译：用于增加多组分封装中的电路互连和组件容量的方法和系统
公开(公告)号：WO2007076020A3
公开(公告)日：2008-06-05
申请号：PCT/US2006049043
申请日：2006-12-21
申请人： ATMEL CORP , LAM KEN
发明人： LAM KEN
IPC分类号： H01K3/10
CPC分类号： H01L23/49833 , H01L25/162 , H01L2224/32225 , H01L2224/48227 , H01L2924/19105 , H01L2924/19106 , H01L2924/19107 , H01L2924/3025 , H01L2924/00
摘要： A method and system for fabricating a interconnect substrate for a multi- component package is disclosed. The multi-component package includes at least one die and a package substrate. The method and system include providing an insulating base and providing at least one conductive layer. The at least one conductive layer provides interconnects for at least one discrete component. The interconnect substrate is configured to be mounted on the at least one die and to have the at least one discrete component mounted on the interconnect substrate.
摘要翻译：公开了一种用于制造多组件封装的互连衬底的方法和系统。多组件封装包括至少一个管芯和封装衬底。该方法和系统包括提供绝缘基底并提供至少一个导电层。至少一个导电层为至少一个分立元件提供互连。互连基板被配置为安装在至少一个管芯上并且具有安装在互连基板上的至少一个分立部件。

3. 发明申请

WO2007133405A3 SHIELDED FLEXIBLE CIRCUITS AND METHODS FOR MANUFACTURING SAME 审中-公开
公开(公告)号：WO2007133405A3
公开(公告)日：2007-11-22
申请号：PCT/US2007/010009
申请日：2007-04-26
申请人： MULTI-FINELINE ELECTRONIX, INC. , WESSELMANN, Dale , TAPSCOTT, Charles E.
发明人： WESSELMANN, Dale , TAPSCOTT, Charles E.
IPC分类号： H05K1/09 , H05K1/11 , H05K1/14 , H01K3/10
摘要： A shielded flexible cable having a plurality of shielded electronic circuits in close proximity to one another such that signals transmitted on one of said plurality of shielded electronic circuits do not substantially interfere with signals transmitted on the other of said plurality of electronic circuits comprising a polyimide support member supporting a plurality of etched copper traces on a first side of said polyimide support member and a copper layer on a second side of said polyimide support member; said polyimide support member flexible along at least one axis; said plurality of etched copper traces and said copper layer substantially as flexible as said polyimide support member; a silver based material, including, for example, silver ink or silver film, surrounding a portion of each of said plurality of copper traces along substantially the entire length of each of said plurality of copper traces; said silver based material in electrical communication with (i) said copper layer via discontinuities in said polyimide support member, and (ii) a grounded terminal; an electrically insulative material in substantial proximity to each of said plurality of copper traces so as to electrically insulate each of said plurality of copper traces from (i) the other said plurality of copper traces, and (ii) said silver based material; said electrically insulative material physically located between said silver based material and each of said plurality of copper traces; a first dielectric layer covering substantially the entire exposed surface of said silver based material; and a second dielectric layer covering substantially the entire exposed surface of said copper layer.

4. 发明申请

WO2006089255A2 HIGH ASPECT RATIO PLATED THROUGH HOLES IN A PRINTED CIRCUIT BOARD 审中-公开
标题翻译：在印刷电路板上通过孔铺设的高比例比例
公开(公告)号：WO2006089255A2
公开(公告)日：2006-08-24
申请号：PCT/US2006/005892
申请日：2006-02-16
申请人： SANMINA-SCI CORPORATION
发明人： KNIGHT, Suzanne , THOMAS, Douglas
IPC分类号： H05K1/11 , H01K3/10
CPC分类号： H05K3/4623 , H05K1/112 , H05K3/0047 , H05K3/306 , H05K3/308 , H05K3/4069 , H05K3/429 , H05K2201/044 , H05K2201/09472 , H05K2201/09509 , H05K2201/09536 , H05K2201/0959 , H05K2201/1059 , H05K2203/061 , H05K2203/1476 , Y10T29/49156 , Y10T29/49165
摘要： The drilling and plating of high aspect ratio blind via holes in a multilayer printed circuit board are disclosed. A via hole is drilled through a sub-composite structure. The walls of the via hole are plated with a conductive material, and the hole is filled with a conductive medium. The sub-composite structure proceeds through the remainder of the processing that is necessary to manufacture the printed circuit board up to the completion of the solder mask step. The conductive medium of the via hole is drilled out to achieve a hole size that is of the desired diameter as required by the printed circuit board design.
摘要翻译：公开了多层印刷电路板中高纵横比盲孔的钻孔和电镀。通过子复合结构钻通孔。通孔的壁镀有导电材料，并且该孔填充有导电介质。子复合结构进行到制造印刷电路板直到完成焊接掩模步骤所需的处理的其余部分。钻出通孔的导电介质以实现根据印刷电路板设计所要求的所需直径的孔尺寸。

5. 发明申请

WO2005055369A3 METHODS FOR MAKING VERTICAL ELECTRICAL FEED THROUGH STRUCTURES 审中-公开
标题翻译：通过结构制作垂直电气进给的方法
公开(公告)号：WO2005055369A3
公开(公告)日：2005-11-24
申请号：PCT/US2004039394
申请日：2004-11-22
申请人： FORMFACTOR INC , MATHIEU GAETAN L , KHANDROS IGOR K , REYNOLDS CARL V
发明人： MATHIEU GAETAN L , KHANDROS IGOR K , REYNOLDS CARL V
IPC分类号： G01R1/067 , G01R1/073 , G01R3/00 , H05K3/30 , H05K3/42 , H01K3/10
CPC分类号： H05K3/42 , G01R1/06711 , G01R1/07307 , G01R3/00 , H05K3/308 , H05K2201/09836 , H05K2203/0338
摘要： Methods are provide for making vertical feed through electrical connections structure in a substrate or tile. The vertical feed through (Fig. 2, 10) can be configured to make plated through holes usable for inserting and attaching connector probes ( Fig. 2, 12). Probes may be attached to the plated through holes or attachment wells to create resilient spring contacts to form a wafer probe card assembly. A twisted tube plated through hole structure (Fig. 9D, 74) is formed by supporting twisted sacrificial wire coated with the plating material in a substrate (Fig. 9D, 79), and later etching away the wires (Fig. 9A, 74).
摘要翻译：提供了通过基板或瓦片中的电连接结构进行垂直馈送的方法。垂直馈送（图2,10）可以被配置为制造可用于插入和连接连接器探头的电镀通孔（图2,12）。探针可以附着到电镀通孔或连接孔，以产生弹性弹簧触点，以形成晶片探针卡组件。通过将涂覆有电镀材料的扭转牺牲线支撑在基板（图9D，79）中，并且随后蚀刻掉导线（图9A，74），形成通过电镀的通孔结构（图9D，74）。

6. 发明申请

WO2005011343A3 CIRCUIT BOARD WITH EMBEDDED COMPONENTS AND METHOD OF MANUFACTURE 审中-公开
标题翻译：具有嵌入式组件的电路板和制造方法
公开(公告)号：WO2005011343A3
公开(公告)日：2005-06-02
申请号：PCT/US2004023292
申请日：2004-07-20
申请人： MOTOROLA INC , ZOLLO JAMES A , ARLEDGE JOHN K , BARRON JOHN C , BURHANCE GARY R , HOLLEY JOHN , LIEBMAN HENRY F
发明人： ZOLLO JAMES A , ARLEDGE JOHN K , BARRON JOHN C , BURHANCE GARY R , HOLLEY JOHN , LIEBMAN HENRY F
IPC分类号： H05K1/11 , H05K1/18 , H05K3/46 , H05K3/36 , H01K3/10 , H05K3/30 , H05K7/10
CPC分类号： H05K1/185 , H05K1/112 , H05K3/4602 , H05K2201/09509 , H05K2201/10636 , Y02P70/611 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A substrate assembly (10) and method of making same has at least one embedded component (25) in a via (24) of a substrate core (22) and includes a first adhesive layer (20) coupled to the substrate core, and a second adhesive layer (26) on at least portions of a top surface of the substrate core and above portions of the embedded component. The substrate assembly can further include a first conductive layer (18) adhered to the bottom surface of the substrate core and a second conductive layer (28) on the second adhesive layer. The substrate assembly can further include an interconnection (36) between a conductive surface of the embedded component and at least one among the first conductive layer and the second conductive layer. The interconnection can be formed through an opening (34) that at least temporarily exposes at least a conductive surface (32) of the embedded component.
摘要翻译：衬底组件（10）及其制造方法在衬底芯（22）的通孔（24）中具有至少一个嵌入组件（25），并且包括耦合到衬底芯的第一粘合剂层（20）和第二粘合剂层（26）在衬底芯的顶表面的至少部分上和嵌入部件的部分之上。衬底组件还可以包括粘附到衬底芯的底表面的第一导电层（18）和第二粘合剂层上的第二导电层（28）。衬底组件还可以包括在嵌入部件的导电表面与第一导电层和第二导电层中的至少一个之间的互连（36）。互连可以通过至少暂时暴露嵌入式部件的导电表面（32）的开口（34）形成。

7. 发明申请

WO2004082879A2 CONVEYORIZED BLIND MICROVIA LASER DRILLING SYSTEM 审中-公开
标题翻译：输送黑色微波激光钻孔系统
公开(公告)号：WO2004082879A2
公开(公告)日：2004-09-30
申请号：PCT/US2004007987
申请日：2004-03-12
申请人： LASERVIA CORP , BURGESS LARRY W
发明人： BURGESS LARRY W
IPC分类号： B23K20060101 , B23K26/06 , B23K26/08 , B23K26/28 , B23K26/38 , B23K26/40 , H01K3/10 , H05K1/02 , H05K1/11 , H05K1/16 , H05K3/00 , H05K3/46 , B23K
CPC分类号： B23K26/0626 , B23K26/066 , B23K26/082 , B23K26/0853 , B23K26/0876 , B23K26/282 , B23K26/389 , B23K26/40 , B23K2201/40 , B23K2203/50 , H05K1/0269 , H05K1/112 , H05K1/167 , H05K3/0008 , H05K3/0026 , H05K3/0035 , H05K3/4638 , H05K3/4652 , H05K3/4679 , H05K2201/09518 , H05K2201/09845 , H05K2201/09918 , H05K2203/0165 , H05K2203/0554 , H05K2203/056 , H05K2203/081 , H05K2203/082 , H05K2203/1509 , H05K2203/1545 , H05K2203/1563 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , Y10T29/532 , Y10T29/53261
摘要： A laser drilling system for drilling blind vias in printed circuit board panels, multichip modules and chipscale packages with top and bottom surfaces and which include multiple dielectric polymer and metal layers. The system includes a first laser module comprising a laser able to form at least one via per pulse through one or more polymer layers. The vias are circular or non-circular in shape. An articulated arm is adapted to move at a speed of about 200 inches per second and at an acceleration of about 5 g's or more. A beam delivery unit is attached to the articulated arm and a conveyor adapted to move panels at a constant speed. The first laser module positioned on a separate track from the conveyor moves at a faster rate than the conveyor to drill the top surface. A second laser module is positioned to move on another separate track from the conveyor movable at a faster rate so as to drill the bottom surface.
摘要翻译：一种用于在印刷电路板面板，多芯片模块和具有顶表面和底表面的芯片尺寸封装中钻孔盲孔的激光钻孔系统，并且包括多个介电聚合物和金属层。该系统包括第一激光器模块，其包括能够通过一个或多个聚合物层在每个脉冲上形成至少一个通孔的激光器。通孔为圆形或非圆形。铰接臂适于以每秒约200英寸的速度和约5g或更大的加速度移动。梁传送单元附接到铰接臂和适于以恒定速度移动面板的传送器。位于与输送机分离的轨道上的第一激光模块以比输送机更快的速度移动以钻顶表面。第二激光模块被定位成在另一独立的轨道上移动，该输送机能够以更快的速度运动，以便钻下底面。

8. 发明申请

WO2020147940A1 INK FORMULATION FOR INKJET PRINTING OF TiO2 ACTIVE LAYERS 审中-公开
公开(公告)号：WO2020147940A1
公开(公告)日：2020-07-23
申请号：PCT/EP2019/050966
申请日：2019-01-15
申请人： TOYOTA MOTOR EUROPE
发明人： KINGE, Sachin , HUCKABA, Aron, J. , NAZEERUDDIN, Mohammad, Khaja
IPC分类号： C09D11/322 , C09D11/36 , C09D11/38 , H01K3/10 , H01L51/00
摘要： In one aspect, the present invention relates to a composition comprising: (A) a titania source comprising: (A1) TiO 2 particles; and (B) a solvent mixture comprising: (B1) a linear alcohol, an alicyclic alcohol, a benzyl alcohol or a mixture thereof; (B2) poly ethylene glycol, poly propylene glycol, poly(vinyl)alcohol, polyvinylpyrrolidone, ethylcellulose or a mixture thereof; and (B3) an Ν,Ν-dialkylamide, an alkyl sulfoxide or a mixture thereof. In another aspect, the present invention relates to a method of inkjet-printing comprising the following steps: (1) printing the composition of the invention on a substrate to obtain a printed film; (2) optionally dipping the printed film obtained in step (1) in an anti-solvent, to obtain a dipped film; and (3) annealing the dipped film obtained in step (2). In still another aspect, the present invention relates to a use of the composition according to the present invention. In still another aspect, the present invention relates to a solar cell wherein the composition according to the present invention and a composition comprising perovskite precursors are inkjet-printed.

9. 发明申请

WO2015009546A1 SLEEVED COAXIAL PRINTED CIRCUIT BOARD VIAS 审中-公开
标题翻译：同轴打印电路板VIAS
公开(公告)号：WO2015009546A1
公开(公告)日：2015-01-22
申请号：PCT/US2014/046211
申请日：2014-07-10
申请人： MASSACHUSETTS INSTITUTE OF TECHNOLOGY
发明人： BRIGHAM, Glenn A. , PERRY, Bradley Thomas , BELL, Patrick J.
IPC分类号： H01K3/10
CPC分类号： H05K3/42 , H05K1/0222 , H05K1/115 , H05K1/116 , H05K3/0094 , H05K3/4685 , H05K2201/0959 , H05K2201/09745 , H05K2201/10242 , H05K2203/03 , H05K2203/0703 , H05K2203/30 , Y10T29/49123
摘要： A printed circuit board, and a method of fabricating the printed circuit board is disclosed. The printed circuit board includes at least one coaxial via. A hollow via is disposed in the printed circuit board. A metal sleeve is formed around the circumference of said hollow via. An inner conductive path is disposed in the hollow via. Additionally, an insulating material is disposed in the hollow via, between the conducting path and the metal sleeve. The conductive path is used to connect signal traces disposed on two different layers of the printed circuit board. In some embodiments, these signal traces carry signals having a frequency above 1 GHz, although the disclosure is not limited to this embodiment.
摘要翻译：公开了一种印刷电路板和一种制造印刷电路板的方法。印刷电路板包括至少一个同轴通孔。中空通孔设置在印刷电路板中。围绕所述中空通孔的圆周形成金属套筒。内部导电路径设置在中空通孔中。此外，绝缘材料设置在导电路径和金属套筒之间的中空通孔中。导电路径用于连接布置在印刷电路板的两个不同层上的信号迹线。在一些实施例中，这些信号迹线承载频率高于1GHz的信号，尽管本公开不限于该实施例。

10. 发明申请

WO2006089255A3 HIGH ASPECT RATIO PLATED THROUGH HOLES IN A PRINTED CIRCUIT BOARD 审中-公开
标题翻译：在印刷电路板上通过孔铺设的高比例比例
公开(公告)号：WO2006089255A3
公开(公告)日：2007-11-01
申请号：PCT/US2006005892
申请日：2006-02-16
申请人： SANMINA SCI CORP
发明人： KNIGHT SUZANNE , THOMAS DOUGLAS
IPC分类号： H05K1/00 , B05D5/12 , H01K3/10 , H01R12/04 , H05K1/03 , H05K1/11 , H05K1/14 , H05K1/18 , H05K3/00 , H05K3/02 , H05K3/10 , H05K3/20 , H05K3/30 , H05K7/00
CPC分类号： H05K3/4623 , H05K1/112 , H05K3/0047 , H05K3/306 , H05K3/308 , H05K3/4069 , H05K3/429 , H05K2201/044 , H05K2201/09472 , H05K2201/09509 , H05K2201/09536 , H05K2201/0959 , H05K2201/1059 , H05K2203/061 , H05K2203/1476 , Y10T29/49156 , Y10T29/49165
摘要： The drilling and plating of high aspect ratio blind via holes in a multilayer printed circuit board are disclosed. A via hole is drilled through a sub-composite structure. The walls of the via hole are plated with a conductive material, and the hole is filled with a conductive medium. The sub-composite structure proceeds through the remainder of the processing that is necessary to manufacture the printed circuit board up to the completion of the solder mask step. The conductive medium of the via hole is drilled out to achieve a hole size that is of the desired diameter as required by the printed circuit board design.
摘要翻译：公开了多层印刷电路板中高纵横比盲孔的钻孔和电镀。通过子复合结构钻通孔。通孔的壁镀有导电材料，并且该孔填充有导电介质。子复合结构进行到制造印刷电路板直到完成焊接掩模步骤所需的处理的其余部分。钻出通孔的导电介质以实现根据印刷电路板设计所要求的所需直径的孔尺寸。

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