专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2015123864A1 WIRING MEMBER AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：接线构件及其制造方法
公开(公告)号：WO2015123864A1
公开(公告)日：2015-08-27
申请号：PCT/CN2014/072382
申请日：2014-02-21
申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.
发明人： YAMAZAKI, Nobuyuki , KOINUMA, Takayoshi
IPC分类号： H01B11/20 , H01R9/05 , H01R12/59 , H01B7/08 , H01R43/02
CPC分类号： H01R4/023 , H01R9/0515 , H01R12/598 , H01R43/0256 , H01R43/28 , H05K1/117 , H05K3/281 , H05K3/305 , H05K3/3405 , H05K2201/09409 , H05K2201/10356 , Y02P70/613
摘要： A high-quality wiring member in which center conductors (31) are positioned accurately with respect to respective terminal members (22) of a board (20) and connected to them reliably, and a manufacturing method thereof. In an end portion of each of coaxial cables (30) connected to a connection board (20), an outer conductor (33), an inner insulator (32), and a center conductor (31) are exposed in sequence. The connection board (20) has signal terminal members (22) to which the center conductors (31) of the coaxial cables (30) are soldered, respectively, and a pad portion (25) to which the outer conductors (33) of the coaxial cables (30) are connected electrically. Exposed portions of the center conductors (31) are bent to the same side as a whole in the arrangement direction of the coaxial cables (30).
摘要翻译：一种高质量的布线构件，其中心导体（31）相对于板（20）的各个端子构件（22）准确地定位并可靠地与其连接，以及其制造方法。在连接到连接板（20）的每个同轴电缆（30）的端部中，外部导体（33），内部绝缘体（32）和中心导体（31）依次露出。连接板（20）具有分别焊接同轴电缆（30）的中心导体（31）的信号端子部件（22），以及焊接部分（25），其中，外部导体同轴电缆（30）电连接。中心导体（31）的露出部分沿同轴电缆（30）的布置方向整体弯曲到同一侧。

2. 发明申请

WO2015123863A1 WIRING MEMBER AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：接线构件及其制造方法
公开(公告)号：WO2015123863A1
公开(公告)日：2015-08-27
申请号：PCT/CN2014/072381
申请日：2014-02-21
申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.
发明人： YAMAZAKI, Nobuyuki , SEMBA, Hiroyuki , KOINUMA, Takayoshi
IPC分类号： H01R9/05 , H01B11/20
CPC分类号： H01R43/28 , B23K1/0016 , B23K2201/38 , H01R4/023 , H01R9/0515 , H01R12/598 , H01R43/0256 , H05K1/117 , H05K3/281 , H05K3/305 , H05K3/3405 , H05K3/3463 , H05K2201/09409 , H05K2201/10356 , Y02P70/613
摘要： A wiring member and a manufacturing method thereof which enable cost reduction while preventing pitch deviation of coaxial cables (30) and damaging of inner insulators (32). In an end portion of each of coaxial cables (30) connected to a connection board (20), an outer conductor (33), an inner insulator (32), and a center conductor (31) are exposed in sequence. The connection board (20) has signal terminal members (22) to which the center conductors (31) of the coaxial cables (30) are soldered, respectively, and a pad portion (25) to which the outer conductors (33) of the coaxial cables (30) are soldered directly with low-melting-temperature solder (62).
摘要翻译：一种布线构件及其制造方法，其能够在防止同轴电缆（30）的间距偏移和内绝缘体（32）的损坏的同时降低成本。在连接到连接板（20）的每个同轴电缆（30）的端部中，外部导体（33），内部绝缘体（32）和中心导体（31）依次露出。连接板（20）具有分别焊接同轴电缆（30）的中心导体（31）的信号端子部件（22）和焊接部分（25），其中，外部导体同轴电缆（30）直接焊接低熔点焊料（62）。

3. 发明申请

WO2014120635A1 PRINTED CIRCUIT BOARD HAVING ORTHOGONAL SIGNAL ROUTING 审中-公开
标题翻译：具有正交信号路由的印刷电路板
公开(公告)号：WO2014120635A1
公开(公告)日：2014-08-07
申请号：PCT/US2014/013277
申请日：2014-01-28
申请人： FCI ASIA PTE. LTD , FCI AMERICAS TECHNOLOGY LLC
发明人： MINICH, Steven E. , GRAY, Mark R.
IPC分类号： H05K1/14 , H01R12/73
CPC分类号： H05K1/141 , H01R12/724 , H01R12/735 , H01R13/6587 , H05K1/0245 , H05K1/0298 , H05K1/116 , H05K1/14 , H05K3/306 , H05K2201/044 , H05K2201/09227 , H05K2201/09409 , H05K2201/09709 , H05K2201/09718 , H05K2201/10189 , H05K2201/10295 , Y10T29/49165
摘要： In accordance with the various embodiments disclosed herein, electrical connector footprints, such as printed circuit boards, is described comprising one or more of signal traces that each include a first section that extends parallel to the linear array direction and a second section extends in a direction that is different than the linear array direction.
摘要翻译：根据本文公开的各种实施例，描述了诸如印刷电路板的电连接器覆盖区，其包括一个或多个信号迹线，每个信号迹线包括平行于线性阵列方向延伸的第一部分，第二部分沿着方向这与线性阵列方向不同。

4. 发明申请

WO2013015216A1 半導体素子収納用パッケージ、これを備えた半導体装置および電子装置审中-公开
标题翻译：用于存储半导体元件的封装，具有该半导体元件的半导体器件和电子器件
公开(公告)号：WO2013015216A1
公开(公告)日：2013-01-31
申请号：PCT/JP2012/068436
申请日：2012-07-20
申请人：京セラ株式会社 , 辻野真広 , 宮原学
发明人：辻野　真広 , 宮原　学
IPC分类号： H01L23/04
CPC分类号： H01L24/42 , H01L23/057 , H01L23/10 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/16195 , H01L2924/16251 , H01L2924/171 , H05K3/3442 , H05K2201/09172 , H05K2201/09181 , H05K2201/09409 , H05K2201/09909 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要：　本発明の一態様の半導体素子収納用パッケージは、上面に半導体素子を載置する搭載領域を有する基体と、搭載領域を囲むように基体の上面に設けられた枠状部および枠状部の内側から枠状部の外側までを貫通する開口部を有する枠体と、開口部に設けられ、枠体の内側から枠体の外側にまで延在された平板状の絶縁部材と、絶縁部材の上面に設けられ、枠体の内側から枠体の外側にまで延在された複数の配線導体と、絶縁部材の上面であって枠体の外側に設けられ、複数の配線導体を取り囲む連続した金属膜と、を備えている。
摘要翻译：根据本发明的一个实施例的用于容纳半导体元件的封装设置有：具有半导体元件安装在上表面上的安装区域的基座; 框架体，其具有设置在所述基座的上表面上以围绕所述安装区域的框状部分，以及从所述框架形状部分的内部穿过所述框架形部分的外部的开口部; 平板状绝缘部件，其设置在所述开口部中并从所述框体的内部延伸到所述框体的外部; 多个布线导体，其设置在所述绝缘构件的上表面上并且从所述框体的内部延伸到所述框体的外部; 以及设置在所述绝缘构件的上表面上并且在所述框架体的外侧的金属膜，继续围绕所述多个布线导体。

5. 发明申请

WO2013004483A1 LEITERPLATTE MIT KONTAKTEN 审中-公开
标题翻译：与联系人电路板
公开(公告)号：WO2013004483A1
公开(公告)日：2013-01-10
申请号：PCT/EP2012/061652
申请日：2012-06-19
申请人： WEIDMÜLLER INTERFACE GMBH & CO. KG , GERKENS, Michael , NOLTING, Reinhard , SCHNÜCKEL, Markus , JUNG, Thorsten , DEITERT, Christoph , WOHLGEMUTH, Klaus , MEYER, Alexander
发明人： GERKENS, Michael , NOLTING, Reinhard , SCHNÜCKEL, Markus , JUNG, Thorsten , DEITERT, Christoph , WOHLGEMUTH, Klaus , MEYER, Alexander
IPC分类号： H05K3/34 , H01R12/70 , H05K1/14
CPC分类号： H05K3/3405 , H01R12/707 , H01R12/724 , H05K1/142 , H05K3/3447 , H05K2201/09409 , H05K2201/10189 , H05K2201/10446
摘要： Eine Leiterplatte (1), die sich in einer Ebene (E) erstreckt, wobei an der Leiterplatte (1) wenigstens ein Anschlussblock ausgebildet ist, der wenigstens zwei oder mehr erste und zweite Kontakte (5, 6) aufweist, die jeweils einen Kontaktbereich (5a, 6a) aufweisen und einen Lötbereich (5b, 6b), in welchem sie mittels eines Lotmaterials (14) an der Leiterplatte (1) festgelötet sind, dadurch gekennzeichnet, dass die Lötbereiche (5b, 6b) von einer gemeinsamen Seite der Leiterplatte (1) her an der Leiterplatte festgelötet sind.
摘要翻译：在一个平面（E）中，延伸的印刷电路板（1），其中，在所述电路板（1）被至少形成一个端子块包括至少两个或更多的第一和第二触点（5,6），其中的每一个（接触面积图5a，图6a），和（由焊料材料（14它们被焊接到位5B，6B），（在电路板上）的焊接部1），其特征在于，所述焊接部（5B，6B）（从电路板的同一侧 1）之后焊接到电路板上。

6. 发明申请

WO2007149571A2 FLEXIBLE CIRCUIT ELECTRODE ARRAY WITH AT LEAST ONE TACK OPENING 审中-公开
标题翻译：柔性电路电极阵列至少打开一个
公开(公告)号：WO2007149571A2
公开(公告)日：2007-12-27
申请号：PCT/US2007/014618
申请日：2007-06-21
申请人： SECOND SIGHT MEDICAL PRODUCTS, INC. , GREENBERG, Robert, J. , TALBOT, Neil, Hamilton , NEYSMITH, Jordan , LITTLE, James, S. , MECH, Brian, V.
发明人： GREENBERG, Robert, J. , TALBOT, Neil, Hamilton , NEYSMITH, Jordan , LITTLE, James, S. , MECH, Brian, V.
CPC分类号： A61N1/0543 , A61N1/36046 , H05K1/036 , H05K1/0393 , H05K1/118 , H05K3/0014 , H05K2201/05 , H05K2201/053 , H05K2201/09063 , H05K2201/09409 , Y10T29/49002 , Y10T29/49117 , Y10T29/49155 , Y10T29/49156 , Y10T29/49158 , Y10T29/49174 , Y10T29/49176
摘要： The present invention provides a flexible circuit electrode array adapted for neural stimulation, comprising: a polymer base layer; metal traces deposited on said polymer base layer, including electrodes suitable to stimulate neural tissue; a polymer top layer deposited on said polymer base layer and said metal traces at least one tack opening; wherein said polymer base layer, said metal traces and said polymer top layer are thermoformed in a three dimensional shape. The present invention provides further a method of making a flexible circuit electrode array comprising depositing a polymer base layer; depositing metal on said polymer base layer; patterning said metal to form metal traces; depositing a polymer top layer on said polymer base layer and said metal traces; preparing at least one tack opening; and heating said flexible circuit electrode array in a mold to form a three dimensional shape in said flexible circuit electrode array.
摘要翻译：本发明提供一种适用于神经刺激的柔性电路电极阵列，包括：聚合物基层; 沉积在所述聚合物基层上的金属痕迹，包括适于刺激神经组织的电极; 沉积在所述聚合物基层上的聚合物顶层和所述金属迹线至少一个粘性开口; 其中所述聚合物基层，所述金属迹线和所述聚合物顶层被热成型为三维形状。本发明还提供一种制造柔性电路电极阵列的方法，包括沉积聚合物基层; 在所述聚合物基层上沉积金属; 图案化所述金属以形成金属痕迹; 在所述聚合物基底层和所述金属迹线上沉积聚合物顶层; 准备至少一个开口; 并将所述柔性电路电极阵列加热到模具中，以在所述柔性电路电极阵列中形成三维形状。

7. 发明申请

WO01017324A1 BOTTOM OR TOP JUMPERED FOLDABLE ELECTRONIC ASSEMBLY, AND METHOD FOR MANUFACTURE 审中-公开
标题翻译：底部或顶部可折叠电子组件及其制造方法
公开(公告)号：WO01017324A1
公开(公告)日：2001-03-08
申请号：PCT/US1999/020088
申请日：1999-09-02
IPC分类号： H05K1/11 , H05K1/14 , H05K3/00 , H05K3/36
CPC分类号： H05K1/148 , H05K1/117 , H05K1/144 , H05K3/0052 , H05K3/0097 , H05K3/361 , H05K2201/09063 , H05K2201/0909 , H05K2201/09409
摘要： An electronic assembly is made up of a number of rigid circuit boards manufactured on the same or different substrates or panels and with the same materials separated from each other electrically and physically. One of the rigid circuit boards has a comb (7) of printed tabs, or fingers, at the edge, which connects the assembly physically and electrically to a motherboard. Flexible wire jumpers (5) bridge the comb to form electrical connections between the boards. Both boards have printed circuit tabs placed in alignment to each other on both boards across a gap (21) which separates both boards. These tabs facilitate electronic interconnection of both boards via the flexible jumpers, which are groups or clusters of wires (4) separated from each other via a flexible insulator. A method for manufacturing the assembly is also disclosed, in which two boards (1, 2) are created by cutting gaps (21) from a substrate, leaving the two boards separated by a gap and connected by snap-offs (6). Once all the intended electronic components (9) and the flexible jumpers are soldered onto the boards, the boards are rotated, snapping them apart. After a desirable spacing between components of both boards is achieved, both boards are pinned together to maintain achieved proximity.
摘要翻译：电子组件由在相同或不同的基板或面板上制造的多个刚性电路板组成，并且具有彼此在电和物理上彼此分开的相同材料。刚性电路板之一具有在边缘处的印刷突片或指状物的梳子（7），其将组件物理和电连接到母板。柔性跳线（5）桥接梳子以形成电路板之间的电气连接。两个板都有印刷电路板，它们跨越两个板对齐，跨越隔开两个板的间隙（21）。这些标签有助于通过柔性跳线来实现两个电路板的电子互连，这些跳线是通过柔性绝缘体彼此分离的组或电线簇（4）。还公开了一种用于制造组件的方法，其中通过从衬底切割间隙（21）来产生两个板（1,2），留下两个板由间隙分开并通过剔除（6）连接。一旦将所有预期的电子部件（9）和柔性跳线焊接到电路板上，则电路板旋转，将它们分开。在实现两个板的组件之间的期望的间隔之后，两个板被钉扎在一起以保持实现接近。

8. 发明申请

WO9842167A3 METHOD AND DEVICE FOR MEASURING A DEVICE FOR PRODUCING ELECTRICAL COMPONENTS 审中-公开
标题翻译：用于测量用于生产电气部件的装置的方法和装置
公开(公告)号：WO9842167A3
公开(公告)日：1998-12-03
申请号：PCT/DE9800759
申请日：1998-03-13
申请人： SIEMENS AG , HUETTNER STEFAN , MISCHE EKKARD , MUELLER WERNER
发明人： HUETTNER STEFAN , MISCHE EKKARD , MUELLER WERNER
IPC分类号： H05K1/02 , H05K3/30 , H05K13/08 , H05K3/00
CPC分类号： H05K1/0269 , H05K3/303 , H05K13/08 , H05K2201/0108 , H05K2201/09409 , H05K2201/09918 , H05K2201/10689 , H05K2203/166
摘要： Transparent simulated components (4) are inserted into a test board (1) in an insertion machine for inserting such electrical components into printed-circuit boards at defined points. The simulated components are provided with scale-type markings (5). The test board has reference marks (3) with scales which are parallel with these scales and overlap said markings (4). The two vernier-type scales enable scale displacements to be read more clearly in the case of deviations from the ideal position.

9. 发明申请

WO2017068195A1 OBJECT MADE OF A FOLDED SHEET WITH PRINTED ELECTRIC CONTROLS 审中-公开
标题翻译：目标由折叠电子控制板制成
公开(公告)号：WO2017068195A1
公开(公告)日：2017-04-27
申请号：PCT/EP2016/075583
申请日：2016-10-24
申请人： UNIVERSITÄT DES SAARLANDES
发明人： OLBERDING, Simon , STEIMLE, Jürgen
IPC分类号： H05K1/02 , H05K1/11 , H05K1/16 , H01G4/33 , G09F9/30 , G06F3/044 , H05K3/00 , G06T17/00 , H05K1/03 , H05K3/12
CPC分类号： H05K1/028 , G06F3/044 , G06F2203/04102 , G06T19/00 , G06T2219/021 , G09F9/301 , H05K1/0326 , H05K1/0386 , H05K1/11 , H05K1/162 , H05K3/0005 , H05K3/1216 , H05K2201/0145 , H05K2201/046 , H05K2201/047 , H05K2201/09381 , H05K2201/09409 , H05K2201/09418 , H05K2201/10053 , H05K2201/10128 , H05K2201/10151
摘要： The invention is directed to an object (2) with a three-dimensional shape made of a folded sheet (4) so as to form at least one face (6), at least one corner (10) and/or at least one edge (8), the object comprising electrically conductive traces (14) printed on the sheet (4); and at least one functional area (12) printed on one of the at least one face (6), adjacent to one of the at least one edge (8), or adjacent to one of the at least one corner (10), the at least one functional area (12) being electrically connected to the conductive traces (14) and forming at least one control for a touch input, for a display output, and/or for sensing a change of shape of the object.
摘要翻译：本发明涉及具有由折叠片材（4）制成的三维形状以形成至少一个面（6）的物体（2），至少一个角部（10））和/或至少一个边缘（8），所述物体包括印刷在所述片材（4）上的导电迹线（14）; 和印刷在所述至少一个面（6）中的一个上，与所述至少一个边缘（8）中的一个相邻或与所述至少一个角（10）中的一个相邻的至少一个功能区域（12），所述至少一个功能区域（12）电连接到导电迹线（14），并形成用于触摸输入的至少一个控制，用于显示输出，和/或用于感测对象的形状变化。

10. 发明申请

WO2017036827A1 IC DIE, PROBE AND ULTRASOUND SYSTEM 审中-公开
标题翻译： IC DIE，探头和超声系统
公开(公告)号：WO2017036827A1
公开(公告)日：2017-03-09
申请号：PCT/EP2016/069752
申请日：2016-08-19
申请人： KONINKLIJKE PHILIPS N.V.
发明人： SUDOL, Wojtek
IPC分类号： B06B1/02 , A61B8/12 , B81C1/00
CPC分类号： B06B1/02 , A61B8/12 , A61B8/4483 , B06B1/0292 , B81C1/00 , H01L24/46 , H01L2924/00014 , H01R9/0515 , H01R12/62 , H01R43/205 , H05K3/3421 , H05K2201/09409 , H05K2201/10356 , Y02P70/613 , H01L2224/45099
摘要： An integrated circuit die (1) is disclosed that comprises a substrate (30) defining a plurality of circuit elements; a sensor region (10) on the substrate, the sensor region comprising a layer stack defining a plurality of CMUT (capacitive micromachined ultrasound transducer) cells (11); and an interposer region (60) on the substrate adjacent to the sensor region. The interposer region comprises a further layer stack including conductive connections to the circuit elements and the CMUT cells, the conductive connections connected to a plurality of conductive contact regions on an upper surface of the interposer region, the conductive contact regions including external contacts (61) for contacting the integrated circuit die to a connection cable (410) and mounting pads (65) for mounting a passive component (320) on the upper surface. A probe including such an integrated circuit die an ultrasound system including such a probe are also disclosed.
摘要翻译：公开了一种集成电路管芯（1），其包括限定多个电路元件的衬底（30）; 传感器区域（10），所述传感器区域包括限定多个CMUT（电容微机械加工的超声换能器）单元（11）的层堆叠; 以及在所述基板上与所述传感器区域相邻的插入器区域（60）。插入器区域包括另外的层堆叠，其包括与电路元件和CMUT单元的导电连接，导电连接件连接到插入件区域的上表面上的多个导电接触区域，导电接触区域包括外部触点（61）用于将集成电路管芯接触到用于将无源部件（320）安装在上表面上的连接电缆（410）和安装焊盘（65）。还公开了一种包括这种集成电路的探针对包含这种探针的超声系统进行裸片化。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式