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1. 发明申请

WO1995003651A1 VOLTAGE COMPARATOR WITH CONTROLLED OUTPUT CURRENT PROPORTIONAL TO DIFFERENCE VOLTAGE 审中-公开
标题翻译：具有控制输出电流比例的电压比较器
公开(公告)号：WO1995003651A1
公开(公告)日：1995-02-02
申请号：PCT/US1994007104
申请日：1994-06-24
申请人： NATIONAL SEMICONDUCTOR CORPORATION
发明人： NATIONAL SEMICONDUCTOR CORPORATION , RAPP, A., Karl , STOIAN, Lee, L.
IPC分类号： H03K05/24
CPC分类号： H03K5/2418 , H03F3/45094 , H03F3/45192 , H03F2203/45028 , H03F2203/45508 , H03F2203/45656 , H03F2203/45658 , H03K5/2481
摘要： A voltage comparator produces a current output as a function of the differential input voltage. Three transfer functions are detailed. In the linear transfer mode the output varies linearly in the transition region and swings between zero and a well-defined current value. In a truncated response mode, the output is zero for zero differential input voltage, remains at zero for one input voltage polarity, and rises for the other polarity input linearly to a well-defined current value. In the folded response mode the output current is zero for zero differential input and rises linearly in the transition region to a well-defined current value for either polarity of differential input. While a CMOS form of construction is preferred, bipolar construction is also shown.
摘要翻译：电压比较器产生作为差分输入电压的函数的电流输出。详细介绍三种传递功能。在线性传输模式下，输出在过渡区域中线性变化，并在零和定义明确的电流值之间摆动。在截断响应模式下，零差分输入电压的输出为零，对于一个输入电压极性，输出保持为零，另一极性输入线性上升到明确定义的电流值。在折叠响应模式下，零差分输入的输出电流为零，并且在过渡区域中线性上升到差分输入的任一极性的明确定义的电流值。虽然优选构造CMOS形式，但是也示出了双极结构。

2. 发明申请

WO2018001453A1 LINEAR-IN-DB VARIABLE GAIN AMPLIFIER 审中-公开
公开(公告)号：WO2018001453A1
公开(公告)日：2018-01-04
申请号：PCT/EP2016/064915
申请日：2016-06-28
申请人： HUAWEI TECHNOLOGIES CO., LTD. , WAITE, Helen
发明人： WAITE, Helen
IPC分类号： H03G1/00 , H03F3/19 , H03F3/45 , H03F1/08
CPC分类号： H03F3/19 , H03F1/083 , H03F3/45085 , H03F3/45475 , H03F2200/18 , H03F2200/21 , H03F2200/42 , H03F2200/451 , H03F2200/555 , H03F2203/45454 , H03F2203/45472 , H03F2203/45476 , H03F2203/45528 , H03F2203/45544 , H03F2203/45596 , H03F2203/45656 , H03F2203/45701 , H03F2203/45702 , H03G1/0023 , H03G1/0082 , H03G7/06
摘要： A variable gain amplifier (1) is configured to amplify an input signal (I vga_ in ) with a variable gain, resulting in a linear-in-db output signal (I vga_out ). The variable gain amplifier (1) comprises a linear-in-db control current generator (2), a control voltage generator (3) and an output current regulator (4). The linear-in-db control current generator (2) is configured to generate a linear-in-db control current (I Iin_ in_dB ) based on a predefined gain setting. The control voltage generator (3) is configured to generate a control voltage (V vga_ctrl ) from the linear-in-db control current (I lin_ in_dB ). The output current regulator (4) is adapted to generate the linear-in-db output signal (Ivga_out) based on the input signal (I vga_in ) and the control voltage (V vga_ctrl ).
摘要翻译：可变增益放大器（1）被配置为以可变增益放大输入信号（I vga_in），从而产生线性db输出信号（我_{vga_out ）。可变增益放大器（1）包括线性db控制电流发生器（2），控制电压发生器（3）和输出电流调节器（4）。线性db控制电流发生器（2）被配置为基于预定义增益设置来生成线性db控制电流（I in_in_dB_）。控制电压发生器（3）被配置为从线性db控制电流（Iin_in_in_dB_）中产生控制电压（V_vga_ctrl_）。输出电流调节器（4）适用于基于输入信号（I vga_in）和控制电压（V sub_ctrl）产生线性db输出信号（I vga_out）子>）。}

3. 发明申请

WO2016090248A1 HIGH GAIN LOAD CIRCUIT FOR A DIFFERENTIAL PAIR USING DEPLETION MODE TRANSISTORS 审中-公开
标题翻译：使用分离模式晶体管的差分对的高增益负载电路
公开(公告)号：WO2016090248A1
公开(公告)日：2016-06-09
申请号：PCT/US2015/063996
申请日：2015-12-04
申请人： ANALOG DEVICES, INC.
发明人： SHARMA, Yogesh Jayaraman , FIORENZA, James
IPC分类号： H03F3/45 , G05F3/26
CPC分类号： H03K17/6871 , H01L27/088 , H01L29/2003 , H03F3/45188 , H03F3/45385 , H03F2200/303 , H03F2200/75 , H03F2203/45036 , H03F2203/45182 , H03F2203/45184 , H03F2203/45188 , H03F2203/45202 , H03F2203/45208 , H03F2203/45224 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676 , H03F2203/45701 , H03F2203/45702 , H03F2203/45722
摘要： A differential pair gain stage is disclosed. In one embodiment, the gain stage includes a differential pair of depletion-mode transistors, including a first and a second n-type transistor. In certain embodiments of the invention, the depletion mode transistor may be GaN (gallium nitride) field effect transistors. The gain stage includes an active load including one or more depletion mode transistors electrically coupled to at least one of the drains of depletion mode transistors of the differential pair. The active load may include a source follower for maintaining the AC voltages at the drains of the differential pair at a constant value and may further include a casocde stage for setting a fixed drain source voltage across the output transistors to increase the output impedance and gain of the stage.
摘要翻译：公开了差分对增益级。在一个实施例中，增益级包括包括第一和第二n型晶体管的耗尽型晶体管的差分对。在本发明的某些实施例中，耗尽型晶体管可以是GaN（氮化镓）场效应晶体管。增益级包括有源负载，其包括电耦合到差分对的耗尽型晶体管的至少一个漏极的一个或多个耗尽型晶体管。有源负载可以包括源极跟随器，用于将差分对的漏极处的AC电压保持在恒定值，并且还可以包括用于在输出晶体管两端设置固定的漏极源电压的casocde级，以增加输出阻抗和增益舞台。

4. 发明申请

WO2017140087A1 一种放大电路审中-公开
公开(公告)号：WO2017140087A1
公开(公告)日：2017-08-24
申请号：PCT/CN2016/090469
申请日：2016-07-19
申请人：深圳市汇顶科技股份有限公司
发明人：张孟文
IPC分类号： H03F3/45
CPC分类号： H03F1/0205 , H03F1/301 , H03F1/32 , H03F3/005 , H03F3/187 , H03F3/45183 , H03F3/45188 , H03F3/45192 , H03F3/45475 , H03F3/45659 , H03F3/45699 , H03F3/45762 , H03F2200/129 , H03F2200/156 , H03F2200/159 , H03F2200/18 , H03F2200/222 , H03F2200/252 , H03F2200/264 , H03F2200/471 , H03F2200/555 , H03F2203/45008 , H03F2203/45012 , H03F2203/45024 , H03F2203/45028 , H03F2203/45054 , H03F2203/45068 , H03F2203/45082 , H03F2203/45112 , H03F2203/45134 , H03F2203/45136 , H03F2203/45171 , H03F2203/45174 , H03F2203/45182 , H03F2203/45188 , H03F2203/45192 , H03F2203/45208 , H03F2203/45244 , H03F2203/45332 , H03F2203/45421 , H03F2203/45434 , H03F2203/45444 , H03F2203/45512 , H03F2203/45514 , H03F2203/45534 , H03F2203/45544 , H03F2203/45546 , H03F2203/45551 , H03F2203/45586 , H03F2203/45588 , H03F2203/45616 , H03F2203/45632 , H03F2203/45642 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676
摘要：本申请提供了一种放大电路，其包含有一参考电压产生电路、一共模电压转换电路、一共模负反馈电路以及一放大子电路，该参考电压产生电路根据一后级共模电压产生一第一参考电压、一第二参考电压及一参考共模电压，该共模电压转换电路根据该参考共模电压将一前级输出差分信号转换成一差分输入信号，该共模负反馈电路产生一控制电压以快速地建立该放大子电路之一共模负反馈，其中该第一参考电压及该第二参考电压用来消除该前级输出差分信号之一基底信号。本申请提供的放大电路可消除基底信号、转换共模电压及快速建立共模负反馈。

5. 发明申请

WO1998000911A1 DIFFERENTIAL AMPLIFIER 审中-公开
标题翻译：差分放大器
公开(公告)号：WO1998000911A1
公开(公告)日：1998-01-08
申请号：PCT/GB1997001754
申请日：1997-06-26
申请人： SYMBIOS LOGIC INC. , GILL, David, Alan
发明人： SYMBIOS LOGIC INC. , GILL, David, Alan , GASPARIK, Frank
IPC分类号： H03F03/45
CPC分类号： H03F3/4521 , H03F3/3028 , H03F2203/45508 , H03F2203/45656 , H03F2203/45658
摘要： The invention provides for a receiver, such as a differential receiver (300), that includes a first input (302), a second input (304), and an output (306). The receiver (300) has a first signal path from the first input (302) to the output, the first signal path including a first differential amplifier (308) and a first active load (312) wherein the first differential amplifier (308) has an end connected to a first power supply voltage (VDD) and a second end connected to a second power supply voltage and the first active load (312). The first differential amplifier (308) also has a connection to the first input (302) and the second input (304), and the first active load (312) has a connection to the output (306). The receiver (300) also has a second signal path from the second input (304) to the output (306), the second signal path including a second differential amplifier (310) and second active load (314), wherein the second differential amplifier (310) has an end connected to a first power supply voltage and a second end connected to a second power supply voltage (VDD) and the second active load (314). The second differential amplifier (310) also has a connection to the first input (300) and the second input (304), and the second active load (314) has a connection to the output (306). The first signal path and the second signal path both have the same number of devices.
摘要翻译：本发明提供了一种包括第一输入（302），第二输入（304）和输出（306）的接收器，例如差分接收器（300）。接收器（300）具有从第一输入（302）到输出的第一信号路径，第一信号路径包括第一差分放大器（308）和第一有效负载（312），其中第一差分放大器（308）具有连接到第一电源电压（VDD）的端部和连接到第二电源电压的第二端和第一有效负载（312）。第一差分放大器（308）还具有与第一输入（302）和第二输入（304）的连接，并且第一有效负载（312）具有到输出（306）的连接。接收机（300）还具有从第二输入（304）到输出（306）的第二信号路径，第二信号路径包括第二差分放大器（310）和第二有源负载（314），其中第二差分放大器（310）具有连接到第一电源电压的端部和连接到第二电源电压（VDD）和第二有源负载（314）的第二端。第二差分放大器（310）还具有与第一输入（300）和第二输入（304）的连接，并且第二有效负载（314）具有到输出端（306）的连接。第一信号路径和第二信号路径都具有相同数量的设备。

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