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1. 发明申请

WO2013187187A1 半導体装置审中-公开
标题翻译：半导体器件
公开(公告)号：WO2013187187A1
公开(公告)日：2013-12-19
申请号：PCT/JP2013/063999
申请日：2013-05-21
申请人：セイコーインスツル株式会社
发明人：理崎　智光 , 中西　章滋 , 桜井　ひと美 , 島崎　洸一
IPC分类号： H01L21/60 , H01L21/3205 , H01L21/768 , H01L23/522
CPC分类号： H01L24/45 , H01L23/522 , H01L23/5226 , H01L23/60 , H01L24/05 , H01L24/48 , H01L24/78 , H01L24/85 , H01L27/0296 , H01L2224/02166 , H01L2224/04042 , H01L2224/05011 , H01L2224/05013 , H01L2224/05014 , H01L2224/05085 , H01L2224/05095 , H01L2224/05096 , H01L2224/05553 , H01L2224/05554 , H01L2224/05555 , H01L2224/45144 , H01L2224/48451 , H01L2224/48463 , H01L2224/78301 , H01L2224/78303 , H01L2224/85181 , H01L2224/85205 , H01L2924/00014 , H01L2924/35 , H01L2224/05599 , H01L2224/05099 , H01L2924/00015
摘要：　パッド開口部の下のクラックを抑制しつつチップサイズを大きくしないために、保護膜６は、一部の最上層金属膜３を露出するパッド開口部９を有する。このパッド開口部９は矩形で正方形であり、開口幅はｄ０である。第二金属膜２は、パッド開口部９の下において開口部を有する。この開口部は矩形で正方形であり、開口幅はｄ４である。保護膜６の開口端と第二金属膜２の開口端との距離はｄ３である。第二金属膜２は、矩形のリング形状であり、パッド開口部９の内側に、距離ｄ３だけはみ出している。
摘要翻译：为了防止芯片尺寸的增加，在抑制焊盘开口下方的裂纹的同时，保护膜（6）具有暴露最顶层金属膜（3）的一部分的焊盘开口（9）。垫片开口（9）是正方形的，开口的宽度为d0。第二金属膜（2）在焊盘开口（9）的下方具有开口。开口是正方形，开口宽度为d4。保护膜（6）的开口端与第二金属膜（2）的开口端之间的距离为d3。第二金属膜（2）具有矩形环状，并且在焊盘开口（9）的内侧突出距离d3。

2. 发明申请

WO2010049087A8 A SEMICONDUCTOR DEVICE INCLUDING A REDUCED STRESS CONFIGURATION FOR METAL PILLARS 审中-公开
标题翻译：包括金属支柱减少应力配置的半导体器件
公开(公告)号：WO2010049087A8
公开(公告)日：2011-07-07
申请号：PCT/EP2009007549
申请日：2009-10-21
申请人： ADVANCED MICRO DEVICES INC , PLATZ ALEXANDER , KUECHENMEISTER FRANK , LEHR MATTHIAS
发明人： PLATZ ALEXANDER , KUECHENMEISTER FRANK , LEHR MATTHIAS
IPC分类号： H01L23/485 , H01L21/60 , H01L23/31
CPC分类号： H01L24/12 , H01L23/3171 , H01L23/3192 , H01L23/562 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0401 , H01L2224/05027 , H01L2224/05093 , H01L2224/05096 , H01L2224/05567 , H01L2224/05572 , H01L2224/10126 , H01L2224/1147 , H01L2224/11472 , H01L2224/11902 , H01L2224/13007 , H01L2224/13022 , H01L2924/00013 , H01L2924/0002 , H01L2924/01005 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/05042 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/351 , H01L2224/13099 , H01L2924/00014 , H01L2924/00 , H01L2224/05552
摘要： In a metallization system of a sophisticated semiconductor device, metal pillars 271 may be provided so as to exhibit an increased efficiency in distributing any mechanical stress exerted thereon. This may be accomplished by significantly increasing the surface area of the final passivation layer 260 that is in tight mechanical contact with the metal pillar, for example by providing an additional stress distribution element 272 in contact with the pillar 271 and the final passivation layer 260.
摘要翻译：在复杂的半导体器件的金属化系统中，可以提供金属柱271，以便分布施加在其上的任何机械应力的分布效率提高。这可以通过显着增加与金属柱紧密机械接触的最终钝化层260的表面积，例如通过提供与柱271和最终钝化层260接触的附加应力分布元件272来实现。

3. 发明申请

WO2004114406A2 STRUKTURIERTES HALBLEITERELEMENT ZUR REDUZIERUNG VON CHARGINGEFFEKTEN 审中-公开
标题翻译：结构化半导体元件用于减少CHARGINGEFFEKTEN
公开(公告)号：WO2004114406A2
公开(公告)日：2004-12-29
申请号：PCT/EP2004/050884
申请日：2004-05-21
申请人： INFINEON TECHNOLOGIES AG , VOLLERTSEN, Rolf-Peter
发明人： VOLLERTSEN, Rolf-Peter
IPC分类号： H01L23/544
CPC分类号： H01L23/62 , H01L22/34 , H01L24/05 , H01L2224/05093 , H01L2224/05096 , H01L2224/05624 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/0102 , H01L2924/01032 , H01L2924/01033 , H01L2924/01052 , H01L2924/01068 , H01L2924/01082 , H01L2924/14 , H01L2924/19043 , H01L2924/30105 , H01L2924/00014
摘要： Die vorliegende Erfindung bezieht sich auf ein Halbleiterschaltungselement (1) zur Reduzierung von unerwünschten Aufladeeffekten, insbesondere Anschlusselement von Teststrukturen für Halbleiterschaltungen, wobei die Oberfläche (4) des Halbleiterschaltungselements (1) elektrisch von der RestOberfläche (5) des Halbleiterschaltungselements (1) isolierte Leitbahnstrukturen (3) aufweist, und bei dem ausschließlich die Leitbahnstrukturen (3) an nachgeordnete Halbleiterschaltungselemente (8) angeschlossen sind.

4. 发明申请

WO2004001846A3 METHOD AND STRUCTURES FOR REDUCED PARASITIC CAPACITANCE IN INTEGRATED CIRCUIT METALLIZATIONS 审中-公开
标题翻译：集成电路金属化中降低PARASIIC电容的方法与结构
公开(公告)号：WO2004001846A3
公开(公告)日：2004-10-28
申请号：PCT/US0321029
申请日：2003-06-18
申请人： MICRON TECHNOLOGY INC , BATRA SHUBNEESH , CHAINE MICHAEL D , KEETH BRENT , AKRAM SALMAN , MANNING TROY A , JOHNSON BRIAN , MARTIN CHRIS G , MERRITT TODD A , SMITH ERIC J
发明人： BATRA SHUBNEESH , CHAINE MICHAEL D , KEETH BRENT , AKRAM SALMAN , MANNING TROY A , JOHNSON BRIAN , MARTIN CHRIS G , MERRITT TODD A , SMITH ERIC J
IPC分类号： H01L23/485 , H01L23/522 , H01L23/64
CPC分类号： H01L24/05 , H01L23/5222 , H01L24/03 , H01L2224/05093 , H01L2224/05095 , H01L2224/05096 , H01L2224/05556 , H01L2224/05624 , H01L2224/05647 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01061 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/30105
摘要： A method of reducing parasitic capacitance in an integrated circuit having three or more metal levels (M1, M2, M3, etc) is described. The method comprises forming a bond pad (20) at least partially exposed at the top surface of the integrated circuit, forming a metal pad (22) on the metal level (42) below the bond pad (20) and forming an underlying metal pad (26b) on each of the one or more lower metal levels. In the illustrated embodiments, the ratio of an area of at least one of the underlying metal pads (22, 26b) to the area of the bond pad (20) is less than 30%. Parasitic capacitance is thus greatly reduced and signal propagation speeds improved.
摘要翻译：描述了一种降低具有三个或更多个金属水平（M1，M2，M3等）的集成电路中的寄生电容的方法。该方法包括形成至少部分地暴露在集成电路的顶表面处的接合焊盘（20），在接合焊盘（20）下方的金属层（42）上形成金属焊盘（22），并形成下面的金属焊盘（26b）在所述一个或多个下层金属层中的每一个上。在所示实施例中，下面的金属焊盘（22,26b）中的至少一个的面积与焊盘（20）的面积之比小于30％。寄生电容因此大大降低，信号传播速度提高。

5. 发明申请

WO2004059708A2 STRUCTURE AND METHOD FOR BONDING TO COPPER INTERCONNECT STRUCTURES 审中-公开
标题翻译：用于连接到铜互连结构的结构和方法
公开(公告)号：WO2004059708A2
公开(公告)日：2004-07-15
申请号：PCT/US2003/041821
申请日：2003-12-19
申请人： AGERE SYSTEMS INC.
发明人： BACHMAN, Mark, Adam , CHESIRE, Daniel, Patrick , MERCHANT, Sailesh, Mansinh
IPC分类号： H01L21/00
CPC分类号： H01L21/02063 , H01L21/31116 , H01L21/32136 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/45 , H01L2224/0401 , H01L2224/04042 , H01L2224/05022 , H01L2224/05093 , H01L2224/05096 , H01L2224/05554 , H01L2224/05558 , H01L2224/05567 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/11901 , H01L2224/13006 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48624 , H01L2224/48647 , H01L2224/49171 , H01L2224/73265 , H01L2224/8501 , H01L2924/0001 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/00014 , H01L2224/05552 , H01L2924/00
摘要： An integrated circuit structure and a method for fabricating the structure. The method comprises forming a copper bond pad for attaching the integrated circuit to a package. Copper oxide is removed from the pad by reduction in a hydrogen ion atmosphere. For attaching the integrated circuit to a bump-bonding package an under-bump metallization layer is formed over the reduced copper pad and a solder bump formed thereover. The process can also be employed in a wire bonding process by forming an aluminum layer overlying the cleaned copper pad. The structure of the present invention comprises a copper pad formed in a substrate. A passivation layer defining an opening therein overlies the copper pad. A under-bump metallization layer is disposed in the opening and a solder bump overlies the metallization layer. Alternatively, the structure further comprises an aluminum pad disposed overlying the reduced copper pad.
摘要翻译：集成电路结构及其制造方法。该方法包括形成用于将集成电路附接到封装的铜焊盘。通过在氢离子气氛中还原，将铜氧化物从垫中除去。为了将集成电路连接到凸块焊接封装，在减小的铜焊盘上形成凸起下金属化层，并在其上形成焊料凸块。该方法也可以通过形成覆盖在清洁的铜垫上的铝层在引线接合工艺中使用。本发明的结构包括形成在基板中的铜焊盘。限定其中的开口的钝化层覆盖在铜焊盘上。凸起下金属化层设置在开口中，并且焊料凸块覆盖在金属化层上。或者，该结构还包括设置在还原铜垫上的铝垫。

6. 发明申请

WO2003075340A2 METHOD FOR OBTAINING METAL TO METAL CONTACT BETWEEN A METAL SURFACE AND A BONDING PAD. 审中-公开
标题翻译：金属与金属表面与金属接头之间的金属接触的方法。
公开(公告)号：WO2003075340A2
公开(公告)日：2003-09-12
申请号：PCT/BE2003/000038
申请日：2003-03-03
申请人： INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM , BANDA, Pedro , HO, Meng , WHELAN, Caroline
发明人： BANDA, Pedro , HO, Meng , WHELAN, Caroline
IPC分类号： H01L21/60
CPC分类号： H01L24/85 , B82Y30/00 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05073 , H01L2224/05093 , H01L2224/05096 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0566 , H01L2224/05664 , H01L2224/05669 , H01L2224/05678 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/4516 , H01L2224/45164 , H01L2224/45178 , H01L2224/4554 , H01L2224/45669 , H01L2224/48091 , H01L2224/48463 , H01L2224/48624 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/4866 , H01L2224/48664 , H01L2224/48669 , H01L2224/48678 , H01L2224/48724 , H01L2224/48739 , H01L2224/48747 , H01L2224/48755 , H01L2224/48764 , H01L2224/48769 , H01L2224/48839 , H01L2224/48844 , H01L2224/48847 , H01L2224/48855 , H01L2224/4886 , H01L2224/48864 , H01L2224/48878 , H01L2224/85011 , H01L2224/85013 , H01L2224/85205 , H01L2224/85355 , H01L2224/85375 , H01L2224/85395 , H01L2224/8592 , H01L2924/00014 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01047 , H01L2924/01055 , H01L2924/01058 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01088 , H01L2924/014 , H01L2924/05042 , H01L2924/10252 , H01L2924/10253 , H01L2924/14 , H01L2924/15747 , H01L2924/181 , H01L2924/20103 , H01L2924/20104 , H01L2924/20105 , H01L2924/20106 , H05K3/282 , H05K3/328 , H01L2224/78 , H01L2924/00 , H01L2224/48824 , H01L2224/48869 , H01L2224/48744 , H01L2224/4876 , H01L2224/48778 , H01L2924/00015
摘要： A method for obtaining metal-to-metal contact between a bonding surface of a metallic bonding area and a second metal surface is disclosed. The method comprises the steps of : - coating said bonding surface of said metallic bonding area with a chemical composition that forms a self-assembled monolayer on said bonding surface of said metallic bonding area, and - bonding said second metal surface on said coated bonding surface through said selfassembled monolayer. The combination of the coating step and the bonding step result in a metal to metal contact between the bonding surface of he metallic bonding area and the second metal surface. The metallic bonding area can be a semiconductor bond pad, e.g. of a semiconductor device.
摘要翻译：公开了一种用于在金属接合区域的接合表面和第二金属表面之间获得金属对金属接触的方法。该方法包括以下步骤： - 在所述金属接合区的所述接合表面上，用形成自组装单层的化学组合物涂覆所述金属接合区的所述接合表面，以及 - 将所述第二金属表面粘结在所述涂覆的接合表面上通过所述自组装的单层。涂覆步骤和粘合步骤的组合导致金属接合区域的接合表面和第二金属表面之间的金属与金属的接触。金属接合区域可以是半导体接合焊盘，例如，的半导体器件。

7. 发明申请

WO2014174825A1 半導体装置审中-公开
标题翻译：半导体器件
公开(公告)号：WO2014174825A1
公开(公告)日：2014-10-30
申请号：PCT/JP2014/002229
申请日：2014-04-21
申请人：パナソニックIPマネジメント株式会社
发明人：平野　博茂 , 手谷　道成
IPC分类号： H01L21/768 , H01L21/3205 , H01L23/12 , H01L23/522
CPC分类号： H01L24/05 , H01L23/3192 , H01L23/525 , H01L23/562 , H01L24/03 , H01L24/13 , H01L2224/02235 , H01L2224/02351 , H01L2224/0346 , H01L2224/0347 , H01L2224/0391 , H01L2224/0401 , H01L2224/05094 , H01L2224/05095 , H01L2224/05096 , H01L2224/05124 , H01L2224/05147 , H01L2224/05548 , H01L2224/05552 , H01L2224/05567 , H01L2224/05647 , H01L2224/1134 , H01L2224/13014 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2924/00014 , H01L2924/00012 , H01L2924/014
摘要：半導体装置は、半導体基板上に設けられた第１の絶縁膜と、第１の絶縁膜中に形成された第１の配線と、第１の絶縁膜上に形成され、銅を含む再配線と、再配線上に形成された第２の絶縁膜と、第１の絶縁膜中に形成され、第１の配線と再配線とを接続する第１の接続部と、第２の絶縁膜を貫通して再配線に達する第２の接続部とを備える。第１の接続部は、複数の第１のコンタクトを含み、第１のコンタクトにおける半導体基板の主面方向の寸法は、再配線の膜厚に依存する所定の値以下である。
摘要翻译：该半导体装置设置有：配置在半导体基板上的第一绝缘膜; 形成在第一绝缘膜中的第一布线; 形成在第一绝缘膜上并包含铜的重新布线; 形成在再布线上的第二绝缘膜; 第一连接部，形成在所述第一绝缘膜中，并且将所述第一布线和所述再布线相互连接; 以及穿过第二绝缘膜并到达重新布线的第二连接部。第一连接部分包括多个第一触点，并且半导体衬底主表面方向上的第一触点的尺寸不大于取决于重新布线的膜厚度的预定值。

8. 发明申请

WO2014039546A1 ELECTRONIC DEVICES UTILIZING CONTACT PADS WITH PROTRUSIONS AND METHODS FOR FABRICATION 审中-公开
标题翻译：电子设备利用接触垫与制造方法和制造方法
公开(公告)号：WO2014039546A1
公开(公告)日：2014-03-13
申请号：PCT/US2013/058046
申请日：2013-09-04
申请人： RESEARCH TRIANGLE INSTITUTE, INTERNATIONAL
发明人： VICK, Eric , CUNNINGHAM, Garry, Brian , TEMPLE, Dorota
IPC分类号： H01L21/60 , H01L21/3205
CPC分类号： H01L21/76898 , H01L23/481 , H01L23/49827 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/16 , H01L24/94 , H01L25/0657 , H01L2224/0311 , H01L2224/0345 , H01L2224/03462 , H01L2224/036 , H01L2224/039 , H01L2224/0401 , H01L2224/05025 , H01L2224/05096 , H01L2224/05555 , H01L2224/05557 , H01L2224/05569 , H01L2224/0557 , H01L2224/05572 , H01L2224/056 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05676 , H01L2224/05684 , H01L2224/05687 , H01L2224/06181 , H01L2224/13025 , H01L2224/16146 , H01L2224/16235 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2924/12042 , H01L2924/1461 , H01L2924/00014 , H01L2924/0476 , H01L2924/01074 , H01L2924/04941 , H01L2224/0239 , H01L2924/01029 , H01L2924/01013 , H01L2924/01022 , H01L2924/01028 , H01L2924/01079 , H01L2924/01047 , H01L2924/01044 , H01L2224/03 , H01L2924/00
摘要： An electronic device includes a substrate including a front side, a back side, a thickness between the front side and back side, one or more front- side vias extending from the front side into a part of the thickness, and an interconnect via extending from the back side toward the front side; a contact pad on the front side and including one or more protrusions extending through corresponding front- side vias and into the interconnect via; and an interconnect extending through the interconnect via and into contact with the protrusion(s).
摘要翻译：一种电子设备包括：基板，包括前侧，背面，前侧和后侧之间的厚度，从前侧延伸到厚度的一部分的一个或多个前侧通孔;以及互连件，背面朝前方; 在前侧上的接触垫，包括一个或多个延伸穿过对应的前侧通孔并进入互连通孔的突起; 以及通过互连件延伸并与突起接触的互连。

9. 发明申请

WO2012083110A3 IC DEVICE HAVING ELECTROMIGRATION RESISTANT FEED LINE STRUCTURES 审中-公开
标题翻译：具有抗电磁馈线结构的IC器件
公开(公告)号：WO2012083110A3
公开(公告)日：2012-09-07
申请号：PCT/US2011065355
申请日：2011-12-16
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN , HOWARD GREGORY E , THOMPSON PATRICK
发明人： HOWARD GREGORY E , THOMPSON PATRICK
IPC分类号： H01L21/60 , H01L23/60
CPC分类号： H01L24/05 , H01L23/528 , H01L24/13 , H01L2224/0401 , H01L2224/05093 , H01L2224/05094 , H01L2224/05096 , H01L2224/05124 , H01L2224/05572 , H01L2224/05647 , H01L2224/05655 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/1329 , H01L2224/133 , H01L2224/16225 , H01L2224/16227 , H01L2924/00014 , H01L2924/01029 , H01L2924/1305 , H01L2924/14 , H01L2924/1421 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1461 , H01L2924/014 , H01L2224/05552 , H01L2924/00
摘要： An integrated circuit (IC) device (400) includes an electromigration (EM) resistant feed line (401). The IC device includes a substrate (405) including active circuitry (409). A back end of the line (BEOL) metallization stack (420) includes an interconnect metal layer (412) that is coupled to a bond pad (419) by the EM resistant feed line. A bonding feature (435) is on the bond pad. The EM resistant feed line (401) includes a uniform portion (402) and patterned trace portion (405) that extends to the bond pad which includes at least three sub-traces that are electrically in parallel. The sub-traces are sized so that a number of squares associated with each of the sub-traces is within a range of a mean number of squares for the sub-traces plus or minus twenty percent or a current density provided to the bonding feature through each sub- trace is within a range of a mean current density provided to the bonding feature plus or minus twenty percent.
摘要翻译：集成电路（IC）器件（400）包括抗电迁移（EM）的馈线（401）。 IC器件包括具有有源电路（409）的衬底（405）。线（BEOL）金属化叠层（420）的后端包括通过EM抗性馈线耦合到接合焊盘（419）的互连金属层（412）。接合特征（435）位于接合焊盘上。抗EM馈线（401）包括均匀部分（402）和图案化迹线部分（405），其延伸至包括至少三个电并联的子迹线的接合焊盘。子迹线的大小被确定为使得与每个子迹线相关联的多个正方形在子迹线的平均正方形数量的正负20％的范围内，或者通过提供给键合特征的电流密度每个子迹线都在提供给键合特征的平均电流密度范围内加上或减去百分之二十。

10. 发明申请

WO2011107044A2 WATERPROOF STRUCTURE FOR BONDING PAD, WATERPROOF BONDING PAD AND METHOD FOR FORMING WATERPROOF STRUCTURE 审中-公开
标题翻译：用于粘接垫，防水粘合垫的防水结构和形成防水结构的方法
公开(公告)号：WO2011107044A2
公开(公告)日：2011-09-09
申请号：PCT/CN2011073011
申请日：2011-04-19
申请人： HUAWEI TECH CO LTD , WANG JUN , ZOU JUNLIN , ZOU XIAOWEI
发明人： WANG JUN , ZOU JUNLIN , ZOU XIAOWEI
IPC分类号： H01L23/00
CPC分类号： H01R13/5213 , H01L24/03 , H01L24/05 , H01L2224/02126 , H01L2224/02166 , H01L2224/05095 , H01L2224/05096 , H01L2224/05558 , H01L2924/01023 , H01L2924/01033 , H01L2924/12041 , H01L2924/14 , H01R43/005 , Y10T29/49204 , H01L2924/00
摘要： A waterproof structure for a bonding pad, a waterproof bonding pad and a method for forming the waterproof structure are provided. The waterproof structure comprises: a first dielectric layer (210), which has an annular hollowed-out groove (211) along the periphery of the first dielectric layer and a metal annular zone (212) formed in the annular hollowed-out groove; and a second dielectric layer (220), which is formed above the first dielectric layer and located under the bonding pad, and has a plurality of first via holes (221) along the periphery of the second dielectric layer and a plurality of metal posts (222) formed in the first via holes, wherein the first via holes form a hollow annular via hole chain, and the metal annular zone electrically connects to the metal posts. The waterproof structure, the waterproof bonding pad and the method for forming the waterproof structure can make water vapor generated during the manufacture process discharge from the hollowed-out groove and the via holes of the waterproof structure, or remain in the waterproof structure, so as to significantly improve the performance of the device.
摘要翻译：提供了一种用于接合焊盘的防水结构，防水接合焊盘和用于形成防水结构的方法。防水结构包括：第一电介质层（210），其沿着第一电介质层的周边具有环形中空槽（211）和形成在环形中空槽中的金属环形区域（212）以及形成在所述第一电介质层上方且位于所述接合焊盘下方的第二电介质层（220），并且沿着所述第二电介质层的周边具有多个第一通孔（221）和多个金属柱 222），其中所述第一通孔形成中空的环形通孔链，并且所述金属环形区域电连接到所述金属柱。防水结构，防水结合垫和防水结构的形成方法可以使制造过程中产生的水蒸气从防水结构的中空槽和通孔排出，或保留在防水结构中，从而以显着提高设备的性能。

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