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    • 3. 发明申请
    • RECONFIGURABLE CIRCUIT
    • 可重构电路
    • WO2017064744A1
    • 2017-04-20
    • PCT/JP2015/005239
    • 2015-10-16
    • NEC CORPORATION
    • BAI, XuSAKAMOTO, ToshitsuguTADA, MunehiroTSUJI, YukihideTADA, AyukaMIYAMURA, MakotoNEBASHI, Ryusuke
    • H03K19/173H01L27/105
    • H03K19/173H03K19/17748
    • A reconfigurable circuit includes first and second wires and two or more paths active at different times. Each path includes: a first NVRS whose first terminal is connected to the first wire; a first transistor whose drain terminal is connected to a second terminal of the first NVRS; a second NVRS whose first terminal is connected to the second terminal of the first NVRS; a second transistor whose source terminal is connected to a second terminal of the second NVRS and whose drain terminal is connected to the second wire; and a 2-input AND circuit whose output is connected to a gate terminal of the first transistor. A time control signal is supplied to a first input of the 2-input AND circuit and a gate terminal of the second transistor. A write control signal is supplied to a second input of the 2-input AND circuit.
    • 可重新配置的电路包括第一和第二导线以及在不同时间有效的两个或更多个路径。 每条路径包括:第一NVRS,其第一端连接到第一导线; 漏极端子连接到第一NVRS的第二端子的第一晶体管; 第二NVRS,其第一终端连接到第一NVRS的第二终端; 第二晶体管,其源极端子连接到第二NVRS的第二端子并且其漏极端子连接到第二导线; 以及其输出连接到第一晶体管的栅极端的2输入“与”电路。 时间控制信号被提供给2输入AND电路的第一输入端和第二晶体管的栅极端。 写入控制信号被提供给2输入AND电路的第二输入端。
    • 4. 发明申请
    • RECONFIGURABLE CIRCUIT AND THE METHOD FOR USING THE SAME
    • 可重构电路及使用该电路的方法
    • WO2017195236A1
    • 2017-11-16
    • PCT/JP2016/002358
    • 2016-05-13
    • NEC CORPORATION
    • BAI, XuSAKAMOTO, ToshitsuguTSUJI, YukihideMIYAMURA, MakotoTADA, AyukaNEBASHI, Ryusuke
    • H03K19/177
    • A reconfigurable circuit comprising: a first line; a first switch element disposed between the first line and a first power source line of first voltage; a second line; a second switch element disposed between the second line and a second power source line of second voltage which is different from the first voltage; and a resistive switch assembly disposed between the first line and the second line.  The resistive switch assembly including a first non-volatile resistive switch, and a second non-volatile resistive switch whose first end is coupled to a first end of the first non-volatile resistive switch.  The second end of the first non-volatile resistive switch is coupled to the first line, and the second end of the second non-volatile resistive switch is coupled to the second line.
    • 一种可重新配置的电路,包括:第一线; 第一开关元件,设置在第一线和第一电压的第一电源线之间; 第二行; 第二开关元件,设置在所述第二线和不同于所述第一电压的第二电压的第二电源线之间; 以及设置在第一线路和第二线路之间的电阻式开关组件。 该电阻式开关组件包括第一非易失性电阻式开关和第一非易失性电阻式开关,该第一非易失性电阻式开关的第一端耦合到第一非易失性电阻式开关的第一端。 第一非易失性电阻式开关的第二端耦合到第一线,而第二非易失性电阻式开关的第二端耦合到第二线。
    • 5. 发明申请
    • RECONFIGURABLE CIRCUIT
    • 可重新连接电路
    • WO2016117134A1
    • 2016-07-28
    • PCT/JP2015/052246
    • 2015-01-21
    • NEC CORPORATION
    • BAI, XuTSUJI, Yukihide
    • H03K19/177
    • H03K19/09429H01L27/2436H03K19/1737H03K19/177H03K19/17744H03K19/17748
    • The invention is to provide a compact reconfigurable circuit implementing a LUT and a "hard" circuit. The present invention provides a reconfigurable circuit comprising: first wires disposed in a first direction; a second wire disposed in a second direction intersecting the first direction; a power line, a ground line and data input line or data input inverse line coupled to the said first wires one-to-one; a multiplexer, one of whose inputs is connected with the second wire; nonvolatile switch cells utilized to interconnect the first wires and second wire at the crosspoints, wherein every nonvolatile switch cell is constructed by at least one non-volatile resistive switch.
    • 本发明是提供一种实现LUT和“硬”电路的紧凑型可重构电路。 本发明提供一种可重构电路,包括:沿第一方向布置的第一布线; 沿与第一方向相交的第二方向设置的第二线; 电源线,接地线和数据输入线或数据输入反相线,一对一地耦合到所述第一线; 多路复用器,其中一个输入端与第二线相连; 用于在交叉点处互连第一线和第二线的非易失性开关单元,其中每个非易失性开关单元由至少一个非易失性电阻开关构成。