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1. 发明申请

WO2012144095A1 AUTHENTICATOR, AUTHENTICATEE AND AUTHENTICATION METHOD 审中-公开
标题翻译：授权人，认证和认证方法
公开(公告)号：WO2012144095A1
公开(公告)日：2012-10-26
申请号：PCT/JP2011/072698
申请日：2011-09-26
申请人： KABUSHIKI KAISHA TOSHIBA , NAGAI, Yuji , KATO, Taku , SAKAMOTO, Hiroyuki
发明人： NAGAI, Yuji , KATO, Taku , SAKAMOTO, Hiroyuki
IPC分类号： H04L9/32
CPC分类号： H04L9/32 , H04L9/3273 , H04L2209/30 , H04L2209/34 , H04L2209/60 , H04L2209/805
摘要： According to one embodiment, an authenticatee includes, a memory configured to store secret information XY, secret information XY which is created by multiply duplicating, at least twice, the secret information XY, and secret information XY E , a generation module configured to generate a random number A, a generation module configured to generate a random number D which is composed of at least a part of the generated random number A and a random number B which is received, a calculating module configured to generate data C by executing a compression calculated operation with respect to at least a part of the random number D and the secret information XY loaded from the memory, a generation module configured to generate data ν, and a bit-by-bit addition module configured to calculate an calculated result Z from the data ν and the data C.
摘要翻译：根据一个实施例，认证者包括：被配置为存储秘密信息XY的存储器，通过将秘密信息XY和秘密信息XYE至少两次复制复制创建的秘密信息XY，生成模块，被配置为生成随机数字A，生成模块，被配置为生成由生成的随机数A的至少一部分和接收到的随机数B组成的随机数D;计算模块，被配置为通过执行压缩计算的操作来生成数据C 关于随机数D的至少一部分和从存储器加载的秘密信息XY，生成模块被配置为生成数据α，以及逐位加法模块，被配置为从数据中计算计算结果Z ？和数据C.

2. 发明申请

WO2012144096A1 AUTHENTICATOR, AUTHENTICATEE AND AUTHENTICATION METHOD 审中-公开
标题翻译：授权人，认证和认证方法
公开(公告)号：WO2012144096A1
公开(公告)日：2012-10-26
申请号：PCT/JP2011/072699
申请日：2011-09-26
申请人： KABUSHIKI KAISHA TOSHIBA , NAGAI, Yuji , KATO, Taku , SAKAMOTO, Hiroyuki
发明人： NAGAI, Yuji , KATO, Taku , SAKAMOTO, Hiroyuki
IPC分类号： H04L9/32
CPC分类号： H04L9/32 , H04L9/3273 , H04L2209/30 , H04L2209/34 , H04L2209/60 , H04L2209/805
摘要： According to one embodiment, an authenticatee includes, a memory configured to store secret information XYmain, XYsub, and secret information XYmain E , XYsub E, a generation module configured to generate a random number A, a generation module configured to generate a random number D which is composed of at least a part of the generated random number A and a random number B which is received, a generation module configured to generate secret information XY based on the secret information XYmain, XYsub loaded from the memory, a calculating module configured to generate data C by executing a compression calculated operation with respect to at least a part of the random number D and the secret information XY, a generation module configured to generate data ν, and a bit-by-bit addition module configured to calculate an calculated result Z from the data ν and the data C.
摘要翻译：根据一个实施例，认证者包括：被配置为存储秘密信息XYmain，XYsub以及被配置为生成随机数A的生成模块的秘密信息XYmainE，XYsubE的存储器;生成模块，被配置为生成随机数D，由所生成的随机数A的至少一部分和接收到的随机数B组成，生成模块，被配置为基于秘密信息XYmain生成秘密信息XY，从存储器加载的XYsub;计算模块，被配置为生成数据通过相对于随机数D和秘密信息XY的至少一部分执行压缩计算的操作，生成模块被配置为生成数据α，以及逐位加法模块，被配置为计算计算结果Z 从数据？和数据C.

3. 发明申请

WO2012144094A1 AUTHENTICATOR, AUTHENTICATEE AND AUTHENTICATION METHOD 审中-公开
标题翻译：授权人，认证和认证方法
公开(公告)号：WO2012144094A1
公开(公告)日：2012-10-26
申请号：PCT/JP2011/072696
申请日：2011-09-26
申请人： KABUSHIKI KAISHA TOSHIBA , NAGAI, Yuji , KATO, Taku , SAKAMOTO, Hiroyuki
发明人： NAGAI, Yuji , KATO, Taku , SAKAMOTO, Hiroyuki
IPC分类号： H04L9/32
CPC分类号： H04L9/32 , H04L9/3273 , H04L2209/30 , H04L2209/34 , H04L2209/60 , H04L2209/805
摘要： According to one embodiment, an authenticatee includes a memory configured to store a plurality of pieces of secret information XY and a plurality of pieces of secret information XY E which are created by encrypting the plurality of pieces of secret information XY, a generation module configured to generate a random number A, a generation module configured to generate a random number D which is composed of at least a part of the generated random number A and a random number B which is received, a calculating module configured to generate data C by executing a compression operation with respect to at least the random number D and the secret information XY loaded from the memory, a generation module configured to generate data ν , and a bit-by-bit addition module configured to calculate an result Z from the data ν to the data C.
摘要翻译：根据一个实施例，认证者包括被配置为存储通过加密多个秘密信息XY而创建的多个秘密信息XY和多个秘密信息XYE的存储器，生成模块被配置为生成随机数A，生成模块，被配置为生成由生成的随机数A的至少一部分和接收的随机数B组成的随机数D;计算模块，被配置为通过执行压缩来生成数据C 关于至少从存储器加载的随机数D和秘密信息XY的操作，被配置为生成数据α的生成模块以及被配置为从数据α计算结果Z的逐比特加法模块。到数据C.

4. 发明申请

WO2012049881A1 PROTECTION METHOD, DECRYPTION METHOD, PLAYER, STORAGE MEDIUM, AND ENCRYPTION APPARATUS OF DIGITAL CONTENT 审中-公开
标题翻译：保护方法，分解方法，播放器，存储介质和数字内容的加密设备
公开(公告)号：WO2012049881A1
公开(公告)日：2012-04-19
申请号：PCT/JP2011/062860
申请日：2011-05-30
申请人： KABUSHIKI KAISHA TOSHIBA , NAGAI, Yuji , SAKAMOTO, Hiroyuki , NAKAI, Hiroto , MIYATA, Seiji , MIMURA, Hideki
发明人： NAGAI, Yuji , SAKAMOTO, Hiroyuki , NAKAI, Hiroto , MIYATA, Seiji , MIMURA, Hideki
IPC分类号： G06F21/22 , G06F21/24 , H04L9/08 , H04L9/14
CPC分类号： H04L9/0833 , H04L9/0816 , H04L9/0822 , H04L9/0894 , H04L2209/60
摘要： A digital content protection method includes distributing, together with an encrypted content, an encrypted protected program key, a protected content key, and a protected code including an individual instruction code, at least some elements of which are designed according to a unique operation code specification for each content player or for each content player group.
摘要翻译：数字内容保护方法包括与加密内容一起分发加密的受保护程序密钥，受保护内容密钥和包括单独指令代码的受保护代码，其中至少一些元件根据唯一的操作代码规范设计对于每个内容播放器或每个内容播放器组。

5. 发明申请

WO2012002009A1 RECORDING APPARATUS, WRITING APPARATUS, READING APPARATUS, AND METHOD OF CONTROLLING RECORDING APPARATUS 审中-公开
标题翻译：记录装置，书写装置，读取装置和控制记录装置的方法
公开(公告)号：WO2012002009A1
公开(公告)日：2012-01-05
申请号：PCT/JP2011/057506
申请日：2011-03-18
申请人： KABUSHIKI KAISHA TOSHIBA , MATSUKAWA, Shinichi , KASAHARA, Akihiro , SAKAMOTO, Hiroyuki
发明人： MATSUKAWA, Shinichi , KASAHARA, Akihiro , SAKAMOTO, Hiroyuki
IPC分类号： G06F21/24 , G06K19/073 , G11B20/10
CPC分类号： G06F11/10 , G06F21/10 , G11B20/00086 , G11B20/1217 , G11B20/1833 , G11B2220/61
摘要： According to one embodiment, a recording apparatus includes a memory and a controller. The memory is capable of recording data. The controller divides the memory into a first region and a second region and controls the recording of the data. The controller writes externally supplied data into the first region without performing error correction coding and address conversion of a logical address into a physical address for the externally supplied data, and performs the error correction coding and the address conversion for the data, and then writes resulting data into the second region.
摘要翻译：根据一个实施例，记录装置包括存储器和控制器。内存能够记录数据。控制器将存储器分成第一区域和第二区域，并控制数据的记录。控制器将外部提供的数据写入第一区域，而不进行逻辑地址的纠错编码和地址转换为外部提供的数据的物理地址，并对数据执行纠错编码和地址转换，然后写入数据进入第二区域。

6. 发明申请

WO2012105084A1 MEMORY SYSTEM IN WHICH EXTENDED FUNCTION CAN EASILY BE SET 审中-公开
标题翻译：可以轻松设置扩展功能的记忆系统
公开(公告)号：WO2012105084A1
公开(公告)日：2012-08-09
申请号：PCT/JP2011/071776
申请日：2011-09-16
申请人： KABUSHIKI KAISHA TOSHIBA , FUJIMOTO, Akihisa , SAKAMOTO, Hiroyuki
发明人： FUJIMOTO, Akihisa , SAKAMOTO, Hiroyuki
IPC分类号： G11C5/00 , G06F13/38
CPC分类号： G06F3/0659 , G06F3/0604 , G06F3/0679 , G06F9/30134 , G06F12/00 , G06F12/0238 , G11C5/00
摘要： According to one embodiment, a memory system, such as a SDIO card, includes a nonvolatile semiconductor memory device (18), a control section (11a), a memory (14, 15), an extended function section (19), and an extension register. The extended function section (19) is controlled by the control section (11a). The extension register is provided on the memory (14, 15) or on the control section (11a). A first command reads data from the extension register in units of given data lengths. A second command writes data to the extension register in units of given data lengths. A extension register includes a first area, and second area different from the first area, information configured to specify a type of the extended function and controllable driver, and address information indicating a place to which the extended function is assigned, the place being on the extension register, are recorded in the first area, and the second area includes the extended function.
摘要翻译：根据一个实施例，诸如SDIO卡的存储器系统包括非易失性半导体存储器件（18），控制部分（11a），存储器（14,15），扩展功能部分（19）和扩展寄存器。扩展功能部（19）由控制部（11a）控制。扩展寄存器设置在存储器（14,15）或控制部分（11a）上。第一个命令以给定的数据长度为单位从扩展寄存器读取数据。第二个命令以给定的数据长度为单位将数据写入扩展寄存器。扩展寄存器包括第一区域和与第一区域不同的第二区域，被配置为指定扩展功能和可控驱动器的类型的信息，以及指示扩展功能被分配的地点的地址信息，扩展寄存器被记录在第一区域中，第二区域包括扩展功能。

7. 发明申请

WO2008156213A1 MEMORY DEVICE, ELECTRONIC DEVICE, AND HOST APPARATUS 审中-公开
标题翻译：存储装置，电子装置和主机装置
公开(公告)号：WO2008156213A1
公开(公告)日：2008-12-24
申请号：PCT/JP2008/061602
申请日：2008-06-19
申请人： KABUSHIKI KAISHA TOSHIBA , FUJIMOTO, Akihisa , SAKAMOTO, Hiroyuki
发明人： FUJIMOTO, Akihisa , SAKAMOTO, Hiroyuki
IPC分类号： G06K17/00 , G06F3/08 , G06F12/06
CPC分类号： G06F12/0246 , G06F9/4401
摘要： A memory device (11) includes a semiconductor memory (11c) and a controller (11a). The semiconductor memory (11c) includes a first storage area (11c1) and a second storage area (11c2). The controller (11a) controls the semiconductor memory (11c). The memory device (11) is capable of having a first state which is accessible to the first storage area (11c1) and a second state in which data is readable from the second storage area (11c2). The controller (11a) is configured to recognize a first command, a second command, and a third command. The first command transfers the memory device (11) to the first state after the memory device is turned on. The second command transfers the memory device (11) from the first state to the second state. The third command transfers the memory device (11) to the second state without passing through the first state after the memory device is turned on.
摘要翻译：存储器件（11）包括半导体存储器（11c）和控制器（11a）。半导体存储器（11c）包括第一存储区域（11c1）和第二存储区域（11c2）。控制器（11a）控制半导体存储器（11c）。存储装置（11）能够具有第一存储区域（11c1）可访问的第一状态和从第二存储区域（11c2）读取数据的第二状态。控制器（11a）被配置为识别第一命令，第二命令和第三命令。在存储器件接通之后，第一命令将存储器件（11）传送到第一状态。第二命令将存储器件（11）从第一状态传送到第二状态。在存储器件接通之后，第三命令将存储器件（11）传送到第二状态而不经过第一状态。

8. 发明申请

WO2006030966A2 FILE STORAGE DEVICE, HOST APPARATUS, METHOD OF FORMATTING NONVOLATILE SEMICONDUCTOR MEMORY, AND METHOD OF WRITING DATA IN NONVOLATILE SEMICONDUCTOR MEMORY 审中-公开
标题翻译：文件存储装置，主机装置，形成非易失性半导体存储器的方法以及在非易失性半导体存储器中写入数据的方法
公开(公告)号：WO2006030966A2
公开(公告)日：2006-03-23
申请号：PCT/JP2005/017433
申请日：2005-09-15
申请人： KABUSHIKI KAISHA TOSHIBA , ITO, Takafumi , SAKAMOTO, Hiroyuki
发明人： ITO, Takafumi , SAKAMOTO, Hiroyuki
IPC分类号： G06F3/06
CPC分类号： G06F3/061 , G06F3/064 , G06F3/0652 , G06F3/0679
摘要： A file storage device includes a nonvolatile semiconductor memory which is accessed by a file system of a host apparatus. The nonvolatile semiconductor memory has a user data area. The user data area is accessible by the file system. Device information indicates that the nonvolatile semiconductor memory is a nonvolatile semiconductor memory and is written in the user data area.
摘要翻译：文件存储设备包括由主机设备的文件系统访问的非易失性半导体存储器。非易失性半导体存储器具有用户数据区域。用户数据区域可由文件系统访问。器件信息表明非易失性半导体存储器是非易失性半导体存储器，写入用户数据区。

9. 发明申请

WO2005124530A2 METHOD FOR CONTROLLING MEMORY CARD AND METHOD FOR CONTROLLING NONVOLATILE SEMICONDUCTOR MEMORY 审中-公开
标题翻译：用于控制存储卡的方法和用于控制非易失性半导体存储器的方法
公开(公告)号：WO2005124530A2
公开(公告)日：2005-12-29
申请号：PCT/JP2005/011396
申请日：2005-06-15
申请人： KABUSHIKI KAISHA TOSHIBA , ITO, Takafumi , SAKAMOTO, Hiroyuki
发明人： ITO, Takafumi , SAKAMOTO, Hiroyuki
IPC分类号： G06F3/06
CPC分类号： G06F3/0643 , G06F3/0613 , G06F3/0626 , G06F3/0679 , G06F12/0246 , G06F2212/7202
摘要： A method for controlling a memory card which includes a nonvolatile semiconductor memory whose memory area includes a plurality of write areas is disclosed. A first area which is a part of the plurality of write areas is set in accordance with management executed by a first file system. The first file system sequentially writes data along a direction in which addresses of the plurality of write areas increase. A second area which is a part of the plurality of write areas is set in accordance with management executed by a second file system. The second file system writes data in an order which does not depend on the addresses.
摘要翻译：一种用于控制存储卡的方法，该存储卡包括其存储区包括多个写入区的非易失性半导体存储器。根据由第一文件系统执行的管理来设置作为多个写入区域的一部分的第一区域。第一文件系统沿着多个写入区域的地址增加的方向顺序地写入数据。根据由第二文件系统执行的管理设置作为多个写入区域的一部分的第二区域。第二个文件系统以不依赖于地址的顺序写入数据。

10. 发明申请

WO2014203558A1 DEVICE AND MEMORY SYSTEM 审中-公开
标题翻译：设备和存储系统
公开(公告)号：WO2014203558A1
公开(公告)日：2014-12-24
申请号：PCT/JP2014/053391
申请日：2014-02-06
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： FUJIMOTO, Akihisa , SAKAMOTO, Hiroyuki , MATSUKAWA, Shinichi
IPC分类号： G06F13/16 , G06F13/42
CPC分类号： G06F3/0622 , G06F3/0637 , G06F3/0679 , G06F13/16 , G06F13/4234
摘要： According to one embodiment, a device includes a semiconductor memory and a controller. The semiconductor memory includes first and second areas which are accessible from an outside. The controller controls the semiconductor memory. The device includes an unlocked state where reading from the first area and the second area is allowed, and a locked state where the reading from the first area is allowed and the reading from the second area is prohibited. The first area stores at least part of file system information. In the locked state, the at least part of the file system information is readable from the outside.
摘要翻译：根据一个实施例，一种设备包括半导体存储器和控制器。半导体存储器包括可从外部访问的第一和第二区域。控制器控制半导体存储器。该装置包括从第一区域和第二区域读取允许的解锁状态以及允许来自第一区域的读取并且禁止从第二区域读取的锁定状态。第一个区域至少存储一部分文件系统信息。在锁定状态下，文件系统信息的至少一部分可从外部读取。

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