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1. 发明申请

WO2014045021A1 OPTOELECTRONIC DEVICE 审中-公开
标题翻译：光电器件
公开(公告)号：WO2014045021A1
公开(公告)日：2014-03-27
申请号：PCT/GB2013/052425
申请日：2013-09-17
申请人： ISIS INNOVATION LIMITED
发明人： SNAITH, Henry, James , CROSSLAND, Edward, James, William , HEY, Andrew , BALL, James , LEE, Michael , DOCAMPO, Pablo
IPC分类号： H01L51/42 , H01L31/06
CPC分类号： H01L31/036 , C23C14/06 , H01L31/022466 , H01L31/035272 , H01L31/0725 , H01L31/1864 , H01L31/1884 , H01L51/0026 , H01L51/0032 , H01L51/0037 , H01L51/422 , H01L51/4226 , Y02E10/549
摘要： The invention provides an optoelectronic device comprising a photoactive region, which photoactive region comprises: an n-type region comprising at least one n-type layer; a p- type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: a layer of a perovskite semiconductor without open porosity. The perovskite semiconductor is generally light-absorbing. In some embodiments, disposed between the n-type region and the p-type region is: (i) a first layer which comprises a scaffold material, which is typically porous, and a perovskite semiconductor, which is typically disposed in pores of the scaffold material; and (ii) a capping layer disposed on said first layer, which capping layer is said layer of a perovskite semiconductor without open porosity, wherein the perovskite semiconductor in the capping layer is in contact with the perovskite semiconductor in the first layer. The layer of the perovskite semiconductor without open porosity (which may be said capping layer) typically forms a planar heterojunction with the n-type region or the p-type region. The invention also provides processes for producing such optoelectronic devices which typically involve solution deposition or vapour deposition of the perovskite. In one embodiment, the process is a low temperature process; for instance, the entire process may be performed at a temperature or temperatures not exceeding 150 °C.
摘要翻译：本发明提供了包含光活性区的光电器件，该光活性区包括：包含至少一个n型层的n型区; 包括至少一个p型层的p-型区域; 并且设置在n型区域和p型区域之间：没有开孔率的钙钛矿半导体层。钙钛矿半导体通常是光吸收的。在一些实施方案中，设置在n型区域和p型区域之间是：（i）包含通常是多孔的支架材料的第一层和通常设置在支架孔中的钙钛矿半导体材料; 和（ii）设置在所述第一层上的覆盖层，所述覆盖层是没有开放孔隙率的所述钙钛矿半导体层，其中所述覆盖层中的钙钛矿半导体与所述第一层中的钙钛矿半导体接触。没有开放孔隙率的钙钛矿半导体层（其可以是所述覆盖层）通常与n型区域或p型区域形成平面异质结。本发明还提供了用于生产通常涉及钙钛矿的溶液沉积或气相沉积的这种光电器件的方法。在一个实施方案中，该方法是低温过程; 例如，整个过程可以在不超过150℃的温度或温度下进行。

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