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1. 发明申请

WO2011064403A1 INTEGRATED CIRCUIT FOR SPECTRAL IMAGING SYSTEM 审中-公开
标题翻译：用于光谱成像系统的集成电路
公开(公告)号：WO2011064403A1
公开(公告)日：2011-06-03
申请号：PCT/EP2010/068575
申请日：2010-11-30
申请人： IMEC , TACK, Klaas , LAMBRECHTS, Andy , HASPESLAGH, Luc
发明人： TACK, Klaas , LAMBRECHTS, Andy , HASPESLAGH, Luc
IPC分类号： G01J3/26 , G01J3/28 , G01J3/12
CPC分类号： G01J3/2823 , G01J3/12 , G01J3/26 , G01J3/2803 , G01J2003/1226 , G01J2003/265 , G01J2003/2806 , G01J2003/2826 , H04N5/332 , H04N5/378
摘要： An integrated circuit for an imaging system has an array of optical sensors (40), and an array of optical filters (10) each configured to pass a band of wavelengths onto one or more of the sensors, the array of optical filters being integrated with the array of sensors, and the integrated circuit also having read out circuitry (30) to read out pixel values from the array of sensors to represent an image, different ones of the optical filters being configured to have a different thickness, to pass different bands of wavelengths by means of interference, to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
摘要翻译：一种用于成像系统的集成电路具有光学传感器阵列（40）和每个被配置成将波长带传递到一个或多个传感器上的滤光器阵列（10），所述滤光器阵列与所述传感器阵列和所述集成电路还具有读出电路（30），以从所述传感器阵列中读出像素值以表示图像，所述不同的所述滤光器被配置为具有不同的厚度以通过不同的带的波长，以允许检测波长的光谱。读出电路可以使一个光学滤波器下的多个像素平行读出。厚度可以在整个阵列上单调变化。读出或稍后的图像处理可能涉及波长之间的选择或插值，以进行频谱采样或移位，以补偿厚度误差。

2. 发明申请

WO2008053008A2 METHOD FOR MANUFACTURING A MICROMACHINED DEVICE 审中-公开
标题翻译：制造微机械装置的方法
公开(公告)号：WO2008053008A2
公开(公告)日：2008-05-08
申请号：PCT/EP2007/061731
申请日：2007-10-31
申请人： INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC) , ASML NETHERLANDS BV , WITVROUW, Ann , HASPESLAGH, Luc
发明人： WITVROUW, Ann , HASPESLAGH, Luc
IPC分类号： B81C1/00
CPC分类号： H01L21/324 , B81C1/00246 , B81C2203/0735 , Y10T428/24612
摘要： The present invention provides a method for manufacturing micromachined devices on a substrate (10) comprising electrical circuitry, the micromachined devices comprising at least one micromachined structure, without affecting the underlying electrical circuitry. The method comprises providing a protection layer (15) on the substrate (10); providing on the protection layer (15) a plurality of patterned layers for forming the at least one micromachined structure, the plurality of patterned layers comprising at least one sacrificial layer (18); and thereafter removing at least a portion of the sacrificial layer (18) to release the at least one micromachined structure. The method furthermore comprises, before providing the protection layer (15), annealing the substrate (10) at a temperature higher than a highest temperature used during manufacturing of the micromachined device, annealing being for preventing gas formation underneath the protection layer (15) during subsequent manufacturing steps. The present invention also provides a micromachined device obtained by the method according to embodiments of the present invention.
摘要翻译：本发明提供了一种用于在包括电路的基板（10）上制造微机械装置的方法，所述微机械装置包括至少一个微机械结构，而不影响下面的电路。该方法包括在衬底（10）上提供保护层（15）; 在所述保护层（15）上提供用于形成所述至少一个微机械结构的多个图案化的层，所述多个图案化的层包括至少一个牺牲层（18）; 之后去除牺牲层（18）的至少一部分以释放至少一个微机械结构。在提供保护层（15）之前，该方法还包括在高于在制造微机械装置期间使用的最高温度的温度下退火衬底（10），退火是为了防止在保护层（15）下方在保护层后续制造步骤。本发明还提供了通过根据本发明的实施例的方法获得的微机械装置。

3. 发明申请

WO2008135554A1 METHOD FOR FORMING A PLANAR STACKED GATE NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING A FLOATING GATE ELECTRODE AND DEVICES OBTAINED THEREOF 审中-公开
标题翻译：用于形成具有浮动栅电极的平面堆叠栅非易失性半导体存储器件的方法及其获得的器件
公开(公告)号：WO2008135554A1
公开(公告)日：2008-11-13
申请号：PCT/EP2008/055493
申请日：2008-05-05
申请人： INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW , DE VOS, Joeri , HASPESLAGH, Luc
发明人： DE VOS, Joeri , HASPESLAGH, Luc
IPC分类号： H01L21/28 , H01L21/8247 , H01L27/115 , H01L29/788
CPC分类号： H01L29/7881 , H01L21/28273 , H01L27/115 , H01L27/11521
摘要： A method of fabricating a stacked gate nonvolatile memory device, comprising the steps of forming a plurality of conductive floating gate structures above channel regions of the substrate, isolated from each other by a dielectric, the floating gate structure shaving a larger coupling ratio with control gates than with channel regions in the substrate. This comprises the steps of: (a) first forming the dielectric with cavities exposing the substrate at the channel regions, the cavities having predetermined shapes for shaping thefloating gate structures such that their top sides have a larger area than their bottom sides, and (b) afterwards forming the floating gate structures in the cavities. A stacked gate nonvolatile memory device, comprising: a semiconductor substrate; a dielectric formed on the semiconductor substrate, the dielectric comprising cavities exposing the semiconductor substrate at channel regions; and homogenous floating gate structures in the cavities having a larger coupling ratio with thecontrol gates than with channel regions in the substrate.
摘要翻译：一种制造堆叠栅极非易失性存储器件的方法，包括以下步骤：通过电介质彼此隔离的在衬底的通道区域上方形成多个导电浮栅结构，浮栅结构与控制栅极剃须更大的耦合比比衬底中的沟道区域。这包括以下步骤：（a）首先形成具有在沟道区域暴露衬底的空腔的电介质，空腔具有用于使浮选栅极结构成形的预定形状，使得其顶侧具有比其底侧更大的面积，以及（b ）之后在空腔中形成浮栅结构。一种堆叠栅极非易失性存储器件，包括：半导体衬底; 形成在所述半导体衬底上的电介质，所述电介质包括在沟道区域暴露所述半导体衬底的空腔; 并且在腔中具有与控制栅极的耦合比率大于衬底中的沟道区域的均匀浮栅结构。

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