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1. 发明申请

WO2017046072A1 GLITCH COMPENSATION IN ELECTRONIC CIRCUITS 审中-公开
标题翻译：电子电路中的补偿补偿
公开(公告)号：WO2017046072A1
公开(公告)日：2017-03-23
申请号：PCT/EP2016/071532
申请日：2016-09-13
申请人： FIRECOMMS LIMITED
发明人： DONOVAN, Colm , CAHILL, Ciaran , MURPHY, Patrick
IPC分类号： H03K19/003
CPC分类号： H03K19/00346 , H03K19/00369
摘要： A supply circuit for providing pulses of current has a current source (11), a reference voltage source (12) for controlling magnitude of the current, and a current switch (13) for controlling whether or not the current passes through a load. Also, there is a switch control signal terminal (15) for controlling the current switch, and glitch compensation elements including at least one capacitance circuit (32) and associated capacitor drive circuit (21) for feeding a variable correcting voltage back to the reference voltage,), and a controller (33) to control said variable voltage.
摘要翻译：用于提供电流脉冲的电源电路具有电流源（11），用于控制电流幅度的参考电压源（12）和用于控制电流是否流过负载的电流开关（13）。此外，存在用于控制电流开关的开关控制信号端子（15）和包括至少一个电容电路（32）和相关联的电容器驱动电路（21）的毛刺补偿元件，用于将可变校正电压馈送回参考电压，）和控制器（33），用于控制所述可变电压。

2. 发明申请

WO2018228773A1 A WIDE DYNAMIC RANGE OPTICAL RECEIVER 审中-公开
公开(公告)号：WO2018228773A1
公开(公告)日：2018-12-20
申请号：PCT/EP2018/062919
申请日：2018-05-17
申请人： FIRECOMMS LIMITED
发明人： DONOVAN, Colm , LOUGHNAN, Dylan , CAHILL, Ciaran , MURPHY, Patrick , LAMBKIN, John D.
IPC分类号： H03F1/08 , H03F3/08 , H03G1/00 , H03G3/30
CPC分类号： H03F1/086 , H03F3/082 , H03F3/087 , H03F3/45475 , H03F2200/312 , H03F2200/393 , H03F2200/396 , H03F2200/417 , H03F2200/421 , H03F2200/471 , H03F2203/45524 , H03G3/3084
摘要： An optical receiver circuit (100) has a first photodiode (102) and a second diode (103) and an amplifier circuit (104-108) connected to the diodes. The photodiodes are arranged so that the second photodiode receives substantially the same optical signal as the first photodiode but reduced in magnitude. There is a TIA for each channel. The first photodiode is coupled to the input of a first TIA (104), and the second photodiode is connected to the input of a second TIA (105), and the receiver comprises an output (107) linked to the outputs of said TIAs. A switch (106) is connected by separate inputs to the TIAs, and a signal level detection circuit sends a control signal to the switch.

3. 发明申请

WO2018228772A1 A LOW-NOISE TRANSIMPEDANCE AMPLIFIER INCORPORATING A REGULATOR 审中-公开
公开(公告)号：WO2018228772A1
公开(公告)日：2018-12-20
申请号：PCT/EP2018/062918
申请日：2018-05-17
申请人： FIRECOMMS LIMITED
发明人： DONOVAN, Colm , CAHILL, Ciaran , MURPHY, Patrick
IPC分类号： H03F1/08 , H03F3/08 , H03F1/02
CPC分类号： H03F1/086 , H03F1/0261 , H03F3/082 , H03F3/087 , H03F2200/129 , H03F2200/144 , H03F2200/186 , H03F2200/24 , H03F2200/294 , H03F2200/516 , H03F2200/555 , H03F2200/75
摘要： A TIA circuit (1) has an input terminal (11), and an odd number of at least three inverting amplifier stages (A1, A2, and A3) linked in series to the input terminal. A reference voltage source (16) is connected to the source of the transistor of at least the first inverting stage amplifier. A transimpedance feedback circuit (14, Rf) is coupled between the output of the final inverting stage amplifier and the input terminal. The reference voltage may be supplied by a voltage regulator, which can be programmable.

4. 发明申请

WO2017046069A1 A TRANSCONDUCTANCE CURRENT SOURCE 审中-公开
标题翻译：交流电流源
公开(公告)号：WO2017046069A1
公开(公告)日：2017-03-23
申请号：PCT/EP2016/071529
申请日：2016-09-13
申请人： FIRECOMMS LIMITED
发明人： MURPHY, Patrick , DONOVAN, Colm , CAHILL, Ciaran
IPC分类号： H03F3/345 , H03F3/08 , H03F3/50 , H03F1/22 , H03F1/32
CPC分类号： H03F3/345 , H03F1/223 , H03F1/3205 , H03F3/082 , H03F3/505 , H03F2200/456 , H03F2203/5031
摘要： A transconductance circuit has an input terminal (V IN ) and an output terminal (Out), a first current source (4) having a gate connected to said input terminal (V IN ); and a second current source (5), in parallel with said first current source, and having a higher transconductance and a wider dynamic range than the first current source. The current sources are configured so that at a low input voltage only the first current source (4) is on. A voltage drop circuit (2) provides a lower bias voltage for the second current source than for the first current source.
摘要翻译：跨导电路具有输入端（VIN）和输出端（Out），具有连接到所述输入端（VIN）的栅极的第一电流源（4）; 和与所述第一电流源并联的第二电流源（5），并且具有比第一电流源更高的跨导和更宽的动态范围。电流源被配置为使得在低输入电压下，仅第一电流源（4）导通。电压降电路（2）为第二电流源提供比第一电流源低的偏置电压。

5. 发明申请

WO2018228774A1 A POWER EFFICIENT INTEGRATED CIRCUIT LOW OUTPUT IMPEDANCE VOLTAGE REGULATOR 审中-公开
公开(公告)号：WO2018228774A1
公开(公告)日：2018-12-20
申请号：PCT/EP2018/062922
申请日：2018-05-17
申请人： FIRECOMMS LIMITED
发明人： DONOVAN, Colm , CAHILL, Ciaran , MURPHY, Patrick
IPC分类号： H03F3/45 , G05F1/59 , G05F1/595 , G05F1/567
CPC分类号： H03F3/45475 , G05F1/567 , G05F1/59 , G05F1/595 , H03F2200/453 , H03F2200/456
摘要： A voltage regulator has an input node and an output node, a supply voltage rail, and an output transistor (Mn1) with its drain connected directly to the supply voltage (Vdd) rail and its source connected to the output node (14). A first differential voltage amplifier (A1) with its output (11) is coupled to the gate of the output transistor (Mn1). A control loop and a sense transistor (Mn2) are connected to the output transistor and to behave as a scaled copy of the output transistor in which the output transistor acts as a voltage follower, and in which the drain of the sense transistor is connected to the control loop.

6. 发明申请

WO2017046073A1 A VOLTAGE COMPARATOR 审中-公开
标题翻译：电压比较器
公开(公告)号：WO2017046073A1
公开(公告)日：2017-03-23
申请号：PCT/EP2016/071534
申请日：2016-09-13
申请人： FIRECOMMS LIMITED
发明人： DONOVAN, Colm , CAHILL, Ciaran , MURPHY, Patrick
IPC分类号： H03K5/24
CPC分类号： H03K5/2481 , H03K3/02337
摘要： A voltage comparator (1) has a high switching speed and simplicity of design. It minimizes pulse-width distortion of input digital signals when functioning as a digital input buffer in high speed communications applications. In addition it provides a simple hysteresis circuit (31) that is easily tuneable with a reference current. The hysteresis circuit (31) is dependent on a reference current. This current may be chosen to have a proportionality to temperature, supply, or another selectable parameter, and may be programmable, in order to create the desired hysteresis performance.
摘要翻译：电压比较器（1）具有高切换速度和简单的设计。当在高速通信应用中用作数字输入缓冲器时，可以最大限度地减少输入数字信号的脉冲宽度失真。此外，它提供了一个简单的滞后电路（31），可以很容易地与参考电流调谐。滞后电路（31）取决于参考电流。该电流可被选择为具有与温度，电源或另一可选择参数成比例，并且可以是可编程的，以便产生期望的滞后性能。

7. 发明申请

WO2017046068A1 AN OPTICAL RECEIVER WITH A CASCODE FRONT END 审中-公开
标题翻译：带有CASCODE FRONT END的光接收器
公开(公告)号：WO2017046068A1
公开(公告)日：2017-03-23
申请号：PCT/EP2016/071528
申请日：2016-09-13
申请人： FIRECOMMS LIMITED
发明人： MURPHY, Patrick , DONOVAN, Colm , CAHILL, Ciaran
IPC分类号： H04B10/61 , H04B10/69
CPC分类号： H04B10/616 , H04B10/6933
摘要： An optical receiver (1) comprises a differential TIA (4) linked with a photodiode (2, 3) providing a current sense signal (I sig_tia ). The receiver is configured to provide to the TIA a sense signal as a sense TIA input (I sig_tia ) and a second input (I dark_tia ) which is a proportion of the maximum sense signal. The proportion input is half of said maximum sense signal. The inputs to the TIA are via cascode circuits (5, 6), thereby providing the advantages of a low input impedance for large area photodiodes at the TIA input, while creating a fully differential signal at the output, and the reduction of TIA bandwidth in burst mode applications, which filters out high frequency noise.
摘要翻译：光接收器（1）包括与提供电流检测信号（Isig_tia）的光电二极管（2,3））连接的差分TIA（4）。接收器被配置为向TIA提供感测信号作为感测TIA输入（Isig_tia）和作为最大感测信号的比例的第二输入（Idark_tia）。比例输入是所述最大感测信号的一半。 TIA的输入通过共源共享电路（5,6），从而为TIA输入端的大面积光电二极管提供低输入阻抗的优点，同时在输出端产生完全差分信号，并减少TIA带宽突发模式应用，可以滤除高频噪声。

8. 发明申请

WO2017046067A1 AN OPTICAL RECEIVER 审中-公开
标题翻译：光接收机
公开(公告)号：WO2017046067A1
公开(公告)日：2017-03-23
申请号：PCT/EP2016/071526
申请日：2016-09-13
申请人： FIRECOMMS LIMITED
发明人： MURPHY, Patrick , DONOVAN, Colm , CAHILL, Ciaran
IPC分类号： H03F3/08 , H03F3/45
CPC分类号： H03F3/08 , H03F3/087 , H03F3/45
摘要： A receiver has a differential transimpedance amplifier (4) with two inputs and two outputs. The differential transimpedance amplifier (4) provides a differential output and this is peak-detected (15, 16) to provide amplitude reference signals. The differential transimpedance amplifier output and the amplitude reference signals are fed to a differential summing amplifier (10), which provides a fully differential signal to a comparator, or to an automatic gain control circuit (5) to regulate the differential transimpedance amplifier gain. The differential summing amplifier (10) output is a fully differential signal, thereby having lower distortion for DC and burst mode receiver applications.
摘要翻译：接收器具有带有两个输入和两个输出的差分跨阻放大器（4）。差分跨阻放大器（4）提供差分输出，这是峰值检测（15,16）以提供幅度参考信号。差分跨阻放大器输出和幅度参考信号被馈送到差分求和放大器（10），差分求和放大器（10）向比较器或自动增益控制电路（5）提供完全差分信号，以调节差分跨阻放大器增益。差分求和放大器（10）输出是全差分信号，从而对于DC和突发模式接收器应用具有较低的失真。

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