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1. 发明申请

WO2013124000A1 A COMPUTER PROGRAM PRODUCT, A BUNDLING PROXY SYSTEM AND A METHOD FOR PROCESSING REQUESTS FOR WEB CONTENT 审中-公开
标题翻译：计算机程序产品，补丁代理系统和处理WEB内容请求的方法
公开(公告)号：WO2013124000A1
公开(公告)日：2013-08-29
申请号：PCT/EP2012/053214
申请日：2012-02-24
申请人： AALTO-KORKEAKOULUSÄÄTIÖ , MANNER, Jukka , WANG, Le
发明人： MANNER, Jukka , WANG, Le
IPC分类号： G06F17/30
CPC分类号： G06F17/30902
摘要： A computer program product stored on a computer-readable medium is adapted, when executed in a processor, to process a request for a web content so that, when a request (K201, K203) for a web content is received from a terminal (10), a) a description of the web content (K205, K207) is retrieved; b) web objects of the web content (K 209, K211) are retrieved; and c) description and retrieved web objects are returned to the terminal (10) in a bundle (K213). The patent application has an independent patent claim also for a bundling proxy system and a method for processing requests for web content.
摘要翻译：存储在计算机可读介质上的计算机程序产品在处理器中被执行时适于处理对Web内容的请求，使得当从终端（10）接收到用于web内容的请求（K201，K203）时），a）检索到Web内容（K205，K207）的描述; b）检索web内容（K 209，K211）的web对象; 以及c）描述和检索的web对象以束（K213）返回到终端（10）。该专利申请还具有用于捆绑代理系统的独立专利权利要求以及用于处理web内容请求的方法。

2. 发明申请

WO2013167532A1 METHOD AND SYSTEM FOR PREFETCHING DATA 审中-公开
标题翻译：用于预先提取数据的方法和系统
公开(公告)号：WO2013167532A1
公开(公告)日：2013-11-14
申请号：PCT/EP2013/059387
申请日：2013-05-06
申请人： AALTO-KORKEAKOULUSÄÄTIÖ
发明人： MANNER, Jukka , WANG, Le
IPC分类号： H04L29/06
CPC分类号： H04L67/02 , H04L67/141 , H04L67/2847
摘要： A server (120) is configured to: a)in response to receiving a request (M201) for content (C) from a terminal (10), to respond (P201) to the terminal (10) with a response (M203) containing instructions configured to set up a bi-directional communication channel (WS) at the terminal (10) for communication between the server (120) and the terminal (10); b)to load (M205,M207) the content comprising at least one referencing object (A) and a plurality of referenced objects (B1, B2, B3,...) belonging to said content (C); c) to generate a modified referencing object (AM) by replacing in the referencing object (A) such links (L1, L2, L3,...) to referenced objects (B1, B2, B3,...) that are external links with modified links (ML1, ML2, ML3,...) that point to a locally stored version of the same object (B1, B2, B3,...); d)to send the referenced objects (B1, B2, B3,...) to the terminal (10) over the bi-directional communication channel (WS); and to send the modified referencing object (AM) to the terminal (10), in such a manner that the modified links (ML1, ML2, ML3) in the modified referencing object (AM) point to referenced objects (B1, B2, B3) already sent to the terminal (10). The patent application comprises also parallel independent claims for a method and a system.
摘要翻译：服务器（120）被配置为：a）响应于从终端（10）接收到用于内容（C）的请求（M201），以包含响应（M203）的方式响应（P201）到终端（10）指令，被配置为在所述终端（10）处建立用于所述服务器（120）和所述终端（10）之间的通信的双向通信信道（WS）; b）加载（M205，M207）包含属于所述内容（C）的至少一个参考对象（A）和多个参考对象（B1，B2，B3，...）的内容; c）通过将参考对象（A）中的链接（L1，L2，L3，...）替换为外部的引用对象（B1，B2，B3，...）来生成修改的引用对象（AM）指向同一对象（B1，B2，B3，...）的本地存储版本的修改链接（ML1，ML2，ML3，...）的链接; d）通过双向通信信道（WS）将参考对象（B1，B2，B3，...）发送到终端（10）; 并且将经修改的引用对象（AM）发送到终端（10），使得修改的引用对象（AM）中的修改的链接（ML1，ML2，ML3）指向被引用的对象（B1，B2，B3 ）已经发送到终端（10）。专利申请还包括用于方法和系统的并行独立权利要求。

3. 发明申请

WO2012065515A1 VDMOS DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译： VDMOS器件及其制造方法
公开(公告)号：WO2012065515A1
公开(公告)日：2012-05-24
申请号：PCT/CN2011/081743
申请日：2011-11-03
申请人： CSMC TECHNOLOGIES FAB1 CO., LTD , CSMC TECHNOLOGIES FAB2 CO., LTD. , WANG, Le
发明人： WANG, Le
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7802 , H01L21/26533 , H01L29/0653 , H01L29/0878 , H01L29/66719
摘要： A Vertical Double-diffused Metal-Oxide-Semiconductor (VDMOS) device and a method for fabricating the same are provided. The VDMOS device includes a substrate which includes a body layer (201) and an epitaxial layer (202) formed over the body layer (201). The body layer (201) has a drain region. The VDMOS device further includes an isolating region (203) formed in the epitaxial layer (202), a first body region (204) and a second body region (205) formed in the epitaxial layer (202) and located at two sides of the isolating region (203), a first source region (206) and a second source region (207) formed in the first body region (204) and the second body region (205) respectively, and a gate region formed above the isolating region (203) and located between the first source region (206) and the second source region (207).
摘要翻译：提供了垂直双扩散金属氧化物半导体（VDMOS）器件及其制造方法。 VDMOS器件包括衬底，其包括主体层（201）和形成在体层（201）上的外延层（202）。主体层（201）具有漏极区域。 VDMOS器件还包括形成在外延层（202）中的隔离区（203），形成在外延层（202）中的第一体区（204）和第二体区（205）隔离区域（203），分别形成在第一体区（204）和第二体区（205）中的第一源极区（206）和第二源极区（207），以及形成在隔离区 203）并且位于第一源极区（206）和第二源极区（207）之间。

4. 发明申请

WO2012065485A1 LDMOS DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译： LDMOS器件及其制造方法
公开(公告)号：WO2012065485A1
公开(公告)日：2012-05-24
申请号：PCT/CN2011/080671
申请日：2011-10-12
申请人： CSMC TECHNOLOGIES FAB1 CO., LTD. , CSMC TECHNOLOGIES FAB2 CO., LTD. , WANG, Le
发明人： WANG, Le
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7816 , H01L29/0634 , H01L29/0696 , H01L29/0878 , H01L29/42368
摘要： An LDMOS device and a method for fabricating the same are disclosed in embodiments of the present invention. The device includes: a substrate including an epitaxial layer and a well region located in a surface of the epitaxial layer; a source region located in the well region, and a drain region located in the epitaxial layer; a first region and a second region located in the surface of the epitaxial layer and having doping states different from a doping state of the epitaxial layer, where the first region and the second region are located in a drift region between the source region and the drain region, and have different doping states; a field oxide layer located above the first region and the second region; and a gate region located on the well region and the field oxide layer. In the present invention, by replacing the drift region with only one doping state in the prior art with the first region and the second region having different doping states, the doping states of the first region and the second region can be adjusted according to the requirements for the breakdown voltage and the on-resistance, so that the on-resistance is further decreased and the power consumption of the device is reduced while a high breakdown voltage is ensured.
摘要翻译：在本发明的实施例中公开了一种LDMOS器件及其制造方法。该器件包括：衬底，其包括位于外延层的表面中的外延层和阱区; 位于阱区中的源极区和位于外延层中的漏极区; 位于所述外延层的表面中的第一区域和第二区域，并且具有不同于所述外延层的掺杂状态的掺杂态，其中所述第一区域和所述第二区域位于所述源极区域和所述漏极之间的漂移区域中并具有不同的掺杂态; 位于所述第一区域和所述第二区域上方的场氧化物层; 以及位于阱区和场氧化物层上的栅极区。在本发明中，通过在现有技术中仅利用一种掺杂状态代替漂移区域，第一区域和第二区域具有不同的掺杂态，可以根据需要调整第一区域和第二区域的掺杂状态对于击穿电压和导通电阻，导通电阻进一步降低，并且在确保高击穿电压的同时降低器件的功耗。

5. 发明申请

WO2012048624A1 METHOD FOR FABRICATING SMALL-SCALE MOS DEVICE 审中-公开
标题翻译：用于制作小尺寸MOS器件的方法
公开(公告)号：WO2012048624A1
公开(公告)日：2012-04-19
申请号：PCT/CN2011/080557
申请日：2011-10-09
申请人： CSMC TECHNOLOGIES FAB1 CO.,LTD. , CSMC TECHNOLOGIES FAB2 CO.,LTD. , WANG, Le
发明人： WANG, Le
IPC分类号： H01L21/336 , H01L21/265
CPC分类号： H01L29/66492 , H01L29/665 , H01L29/6659 , H01L29/66636 , H01L29/7833
摘要： A method for fabricating a small-scale MOS device, including: preparing a substrate; forming a first trench in the substrate along a first side of the gate region and forming a second trench in the substrate along a second side of the gate region, the first side of the gate region opposite the second side of the gate region; forming a first lightly doped drain region and a second lightly doped drain region in the first trench and the second trench, respectively; forming a third trench in the substrate overlapping at least a first portion of the first lightly doped drain region and a fourth trench in the substrate overlapping at least a first portion of the second lightly doped drain region; and forming a source region and a drain region in the third trench and the fourth trench, respectively.
摘要翻译：一种制造小型MOS器件的方法，包括：制备衬底; 在所述栅极区域的第一侧沿所述衬底中形成第一沟槽，并沿所述栅极区域的第二侧在所述衬底中形成第二沟槽，所述栅极区域与所述栅极区域的第二侧相对的第一侧; 在第一沟槽和第二沟槽中分别形成第一轻掺杂漏极区和第二轻掺杂漏极区; 在所述衬底中形成与所述第一轻掺杂漏极区的至少第一部分重叠的第三沟槽，并且所述衬底中的第四沟槽与所述第二轻掺杂漏极区的至少第一部分重叠; 以及在第三沟槽和第四沟槽中分别形成源区和漏区。

6. 发明申请

WO2012031546A1 MOS DEVICE AND FABRICATING METHOD THEREOF 审中-公开
标题翻译： MOS器件及其制造方法
公开(公告)号：WO2012031546A1
公开(公告)日：2012-03-15
申请号：PCT/CN2011/079359
申请日：2011-09-06
申请人： CSMC TECHNOLOGIES FAB1 CO., LTD , CSMC TECHNOLOGIES FAB2 CO., LTD. , WANG, Le
发明人： WANG, Le
IPC分类号： H01L21/336 , H01L29/78 , H01L21/20 , H01L21/22
CPC分类号： H01L29/66651
摘要： AMOS device and a fabricating method thereof are provided. The fabricating method of the MOS device includes the steps of growing an implanted oxide layer on a substrate (11), forming a well (13) in the substrate (11) by lithography and an ion implantation process, removing the implanted oxide layer, then depositing an epitaxial layer (15) on the surface of the substrate (11) to form a channel region, growing a gate oxide (17) on the epitaxial layer (15), depositing a poly-silicon layer on the gate oxide (17), and then etching the poly-silicon layer to form a gate (19), and implanting ions into the epitaxial layer (15) and the well (13) to form a source (21) and a drain (23) on opposite lateral sides of the gate (19). By using a deposition process to form the epitaxial layer for the channel region, the doping concentration and thickness of the channel region are uniform, and the threshold voltage is stable.
摘要翻译：提供AMOS器件及其制造方法。 MOS器件的制造方法包括以下步骤：在衬底（11）上生长注入的氧化物层，通过光刻和离子注入工艺在衬底（11）中形成阱（13），去除注入的氧化物层，然后在所述衬底（11）的表面上沉积外延层（15）以形成沟道区域，在所述外延层（15）上生长栅极氧化物（17），在所述栅极氧化物（17）上沉积多晶硅层，然后蚀刻多晶硅层以形成栅极（19），并且将离子注入到外延层（15）和阱（13）中，以在相对的侧面上形成源极（21）和漏极（23）的门（19）。通过使用沉积工艺形成用于沟道区的外延层，沟道区的掺杂浓度和厚度是均匀的，并且阈值电压是稳定的。

7. 发明申请

WO2010080503A1 HETEROCYCLIC COMPOUNDS AND METHODS OF USE 审中-公开
标题翻译：杂环化合物和使用方法
公开(公告)号：WO2010080503A1
公开(公告)日：2010-07-15
申请号：PCT/US2009/068496
申请日：2009-12-17
申请人： GENENTECH, INC. , THE WALTER AND ELIZA HALL INSTITUTE OF MEDICAL RESEARCH , ABBOTT LABORATORIES , BAELL, Jonathon, Bayldon , BUI, Chinh, Thien , COLMAN, Peter , CZABOTAR, Peter , DUDLEY, Danette, A. , FAIRBROTHER, Wayne, J. , FLYGARE, John, A. , LASSENE, Guillaume, Laurent , NDUBAKU, Chudi , NIKOLAKOPOULOS, George , SLEEBS, Brad, Edmund , SMITH, Brian, John , WATSON, Keith, Geoffrey , ELMORE, Steven, W. , HASVOLD, Lisa, A. , PETROS, Andrew, M. , SOUERS, Andrew, J. , TAO, Zhi-Fu , WANG, Le , WANG, Xilu , DESHAYES, Kurt
发明人： BAELL, Jonathon, Bayldon , BUI, Chinh, Thien , COLMAN, Peter , CZABOTAR, Peter , DUDLEY, Danette, A. , FAIRBROTHER, Wayne, J. , FLYGARE, John, A. , LASSENE, Guillaume, Laurent , NDUBAKU, Chudi , NIKOLAKOPOULOS, George , SLEEBS, Brad, Edmund , SMITH, Brian, John , WATSON, Keith, Geoffrey , ELMORE, Steven, W. , HASVOLD, Lisa, A. , PETROS, Andrew, M. , SOUERS, Andrew, J. , TAO, Zhi-Fu , WANG, Le , WANG, Xilu , DESHAYES, Kurt
IPC分类号： A01N43/00
CPC分类号： C07D417/14 , C07D471/06 , C07D473/00 , C07D487/04 , C07D495/04 , C07D513/04 , C07D513/06
摘要： In one aspect, the present invention provides for a compound of Formula I; in which the variable X 1a , X 1b , X 1c , X 1d , Q, A, R 1 , B, L, E, and the subscripts m and n have the meanings as described herein. In another aspect, the present invention provides for pharmaceutical compositions comprising compounds of Formula I as well as methods for using compounds of Formula I for the treatment of diseases and conditions (e.g., cancer, thrombocythemia, etc) characterized by the expression or over-expression of Bcl-2 anti-apoptotic proteins, e.g., of anti-apoptotic Bcl-x L proteins.
摘要翻译：一方面，本发明提供式I的化合物; 其中变量X1a，X1b，X1c，X1d，Q，A，R1，B，L，E和下标m和n具有如本文所述的含义。另一方面，本发明提供包含式I化合物的药物组合物以及使用式I化合物治疗以表达或过表达为特征的疾病和病症（例如癌症，血小板增多症等）的方法的Bcl-2抗凋亡蛋白，例如抗凋亡Bcl-xL蛋白。

8. 发明申请

WO2012062175A1 METHOD FOR MANUFACTURING DOUBLE-GATE STRUCTURES 审中-公开
标题翻译：制造双门结构的方法
公开(公告)号：WO2012062175A1
公开(公告)日：2012-05-18
申请号：PCT/CN2011/081718
申请日：2011-11-03
申请人： CSMC TECHNOLOGIES FAB1 CO., LTD , CSMC TECHNOLOGIES FAB2 CO., LTD. , WANG, Le
发明人： WANG, Le
IPC分类号： H01L21/70 , H01L21/02
CPC分类号： H01L29/66484 , H01L21/28518 , H01L21/823443 , H01L21/823468
摘要： A method for manufacturing a double-gate structure is provided. The method includes providing a substrate; forming a first gate region (201) on a surface of the substrate using a first gate layer; forming a second gate layer which covers the first gate layer on the surface of the substrate; forming an etch-stop layer (203) on the second gate layer; forming a silicide layer (205) on the etch-stop layer (203); and forming a second gate region, different from the first gate region (201), containing the second gate layer and the silicide layer (205) without the etch-stop layer (203). The etch-stop layer (203) is arranged between the second gate layer and the silicide layer (205) to facilitate even etching of the second gate layer around the first gate region (201).
摘要翻译：提供一种制造双栅结构的方法。该方法包括提供基板; 使用第一栅极层在所述衬底的表面上形成第一栅极区域（201）; 形成覆盖所述基板表面上的所述第一栅极层的第二栅极层; 在所述第二栅极层上形成蚀刻停止层（203）; 在所述蚀刻停止层（203）上形成硅化物层（205）; 以及形成不含有所述第二栅极层和不具有所述蚀刻停止层（203）的所述硅化物层（205）的与所述第一栅极区域（201）不同的第二栅极区域。蚀刻停止层（203）被布置在第二栅极层和硅化物层（205）之间以促进围绕第一栅极区域（201）的第二栅极层的均匀蚀刻。

9. 发明申请

WO2011149492A1 APOPTOSIS-INDUCING AGENTS FOR THE TREATMENT OF CANCER AND IMMUNE AND AUTOIMMUNE DISEASES 审中-公开
公开(公告)号：WO2011149492A1
公开(公告)日：2011-12-01
申请号：PCT/US2010/057587
申请日：2010-11-22
申请人： ABBOTT LABORATORIES , BRUNCKO, Milan , DING, Hong , DOHERTY, George , ELMORE, Steven , HASVOLD, Lisa , HEXAMER, Laura , KUNZER, Aaron R. , SONG, Xiaohong , SOUERS, Andrew, J. , SULLIVAN, Gerard , TAO, Zhi-Fu , WANG, Gary, T. , WANG, Le , WANG, Xilu , WENDT, Michael , MANTEI, Robert , HANSEN, Todd, M.
发明人： BRUNCKO, Milan , DING, Hong , DOHERTY, George , ELMORE, Steven , HASVOLD, Lisa , HEXAMER, Laura , KUNZER, Aaron R. , SONG, Xiaohong , SOUERS, Andrew, J. , SULLIVAN, Gerard , TAO, Zhi-Fu , WANG, Gary, T. , WANG, Le , WANG, Xilu , WENDT, Michael , MANTEI, Robert , HANSEN, Todd, M.
IPC分类号： C07D471/04 , A61K31/437 , A61K35/00
CPC分类号： C07D401/12 , A61K31/496 , C07D209/82 , C07D401/14 , C07D403/12 , C07D471/04 , C07D519/00 , Y02A50/463
摘要： Disclosed are compounds which inhibit the activity of anti-apoptotic Bcl-2 proteins, compositions containing the compounds and methods of treating diseases during which is expressed anti-apoptotic Bcl-2 protein.

10. 发明申请

WO2008082839A2 PIM KINASE INHIBITORS AS CANCER CHEMOTHERAPEUTICS 审中-公开
标题翻译： PIM激酶抑制剂作为癌症化学疗法
公开(公告)号：WO2008082839A2
公开(公告)日：2008-07-10
申请号：PCT/US2007/086472
申请日：2007-12-05
申请人： ABBOTT LABORATORIES , PENNING, Thomas D , HASVOLD, Lisa A , HEXAMER, Laura A , GIRANDA, Vincent L , LIN, Nan-horng , TAO, Zhi-fu , WANG, Le
发明人： PENNING, Thomas D , HASVOLD, Lisa A , HEXAMER, Laura A , GIRANDA, Vincent L , LIN, Nan-horng , TAO, Zhi-fu , WANG, Le
IPC分类号： A61K31/519 , A61P35/00
CPC分类号： C07D495/04
摘要： Inhibitors of Pim kinases, ways to make them and methods of treating patients using them are disclosed.
摘要翻译：披露了Pim激酶的抑制剂，制备方法以及使用它们治疗患者的方法。

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