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1. 发明申请

WO1998015956A1 CLOCK GENERATING APPARATUS AND DISK DRIVING APPARATUS 审中-公开
标题翻译：时钟发生装置和盘驱动装置
公开(公告)号：WO1998015956A1
公开(公告)日：1998-04-16
申请号：PCT/JP1997003616
申请日：1997-10-08
申请人： SONY CORPORATION , YADA, Hiroaki
发明人： SONY CORPORATION
IPC分类号： G11B20/10
CPC分类号： G11B20/10037 , G11B5/59616 , G11B5/59688 , G11B20/1403 , G11B27/24 , G11B27/3027 , G11B2220/20
摘要： A clock generating apparatus applicable to a sample servo type magnetic disk. A clock pattern regenerative signal z(t) is digitized by an A/D converter (33), and the resultant signal is supplied to a phase comparator (52). The linear coupling of N-pieces of sample values and N-pieces of weighting coefficients is subjected to inner product computation in a computing element (61) to obtain a phase comparison error signal f( theta ) from a D flip-flop (62). This signal f( theta ) is analoged in a D/A converter (53), and the resultant signal is supplied as a control signal to VCO (51) via a loop filter (54), the phase of a clock signal CLK from the VCO (51) being controlled to obtain a clock signal CLK synchronous with the regenerative signal z(t). When coefficients the sum of which becomes zero are used as weighting coefficients, a signal f( theta ) not influenced by DC component on which the regenerative signal z(t) is superposed, can be obtained, and a clock signal CLK synchronized with a high accurancy with the regenerative signal z(t) can be obtained.
摘要翻译：一种适用于样品伺服型磁盘的时钟发生装置。时钟模式再生信号z（t）由A / D转换器（33）数字化，并将所得到的信号提供给相位比较器（52）。对N个采样值和N个加权系数的线性耦合在计算元件（61）中进行内积计算，以获得来自D触发器（62）的相位比较误差信号f（theta）。该信号f（θ）在D / A转换器（53）中被模拟，并且所得到的信号经由环路滤波器（54）作为控制信号提供给VCO（51），来自 VCO（51）被控制以获得与再生信号z（t）同步的时钟信号CLK。当将其和为零的系数用作加权系数时，可以获得不受再生信号z（t）叠加的DC分量影响的信号f（θ），并且与高频同步的时钟信号CLK 可以获得与再生信号z（t）的精度。

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