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1. 发明申请

WO2005091974A9 METHODS FOR THE OPTIMIZATION OF SUBSTRATE ETCHING IN A PLASMA PROCESSING SYSTEM 审中-公开
标题翻译：在等离子体处理系统中优化基板蚀刻的方法
公开(公告)号：WO2005091974A9
公开(公告)日：2005-11-24
申请号：PCT/US2005007886
申请日：2005-03-09
申请人： LAM RES CORP , KIM JISOO , WORSHAM BINET , YEN BI-MING , LOEWENHARDT PETER K
发明人： KIM JISOO , WORSHAM BINET , YEN BI-MING , LOEWENHARDT PETER K
IPC分类号： B44C1/22 , C03C15/00 , C23F1/00 , H01L21/302 , H01L21/311 , H01L21/768
CPC分类号： H01L21/31144 , H01L21/76811 , H01L21/76813
摘要： A method of etching a substrate in a plasma processing system is disclosed. The substrate has a semi-conductor layer, a first barrier layer disposed above the semi-conductor layer, a low-k layer disposed above the first barrier layer, a third hard mask layer disposed above the low-k layer; a second hard mask layer disposed above the third hard mask layer, and a first hard mask layer disposed above the second hard mask layer. The method includes alternatively etching the substrate with a first etchant and a second etchant, wherein the first etchant has a low selectivity to a first hard mask material of the first hard mask layer, a third hard mask material of the a third hard mask layer, and a first barrier layer material of the first barrier layer, but a high selectivity to a second hard mask material of the second hard mask layer; and wherein the second etchant has a high selectivity to the first hard mask material of the first hard mask layer, the third hard mask material of the third hard mask layer, and the first barrier layer material of the first barrier layer, and the first etchant has a low selectivity to the second hard mask material of the second hard mask layer.
摘要翻译：公开了一种在等离子体处理系统中蚀刻衬底的方法。衬底具有半导体层，设置在半导体层上方的第一势垒层，设置在第一阻挡层上方的低k层，设置在低k层上方的第三硬掩模层; 设置在第三硬掩模层之上的第二硬掩模层，以及设置在第二硬掩模层上方的第一硬掩模层。所述方法包括用第一蚀刻剂和第二蚀刻剂替代地蚀刻所述衬底，其中所述第一蚀刻剂对所述第一硬掩模层的第一硬掩模材料具有低选择性，所述第三硬掩模层的第三硬掩模材料，和第一阻挡层的第一阻挡层材料，但对第二硬掩模层的第二硬掩模材料具有高选择性; 并且其中第二蚀刻剂对第一硬掩模层的第一硬掩模材料，第三硬掩模层的第三硬掩模材料和第一阻挡层的第一阻挡层材料和第一蚀刻剂具有高选择性对第二硬掩模层的第二硬掩模材料具有低选择性。

2. 发明申请

WO2006104655A2 ETCH WITH PHOTORESIST MASK 审中-公开
标题翻译： ETCH与摄影师面具
公开(公告)号：WO2006104655A2
公开(公告)日：2006-10-05
申请号：PCT/US2006008306
申请日：2006-03-07
申请人： LAM RES CORP , KIM JISOO , LEE SANGHEON , WORSHAM BINET A , CHARATAN ROBERT , SADJADI S M REZA
发明人： KIM JISOO , LEE SANGHEON , WORSHAM BINET A , CHARATAN ROBERT , SADJADI S M REZA
IPC分类号： H01L21/311
CPC分类号： H01L21/31116
摘要： A method for etching a dielectric layer over a substrate is provided. A photoresist mask is formed over the dielectric layer. The substrate is placed in a plasma processing chamber. An etchant gas comprising NF 3 is provided into the plasma chamber. A plasma is formed from the NF 3 gas. The dielectric layer is etched through the photoresist mask with the plasma from the NF 3 gas.
摘要翻译：提供了一种在衬底上蚀刻电介质层的方法。在电介质层上形成光致抗蚀剂掩模。将基板放置在等离子体处理室中。包含NF 3 N的蚀刻剂气体被提供到等离子体室中。从NF 3 N气体形成等离子体。通过来自NF 3 N 3气体的等离子体通过光致抗蚀剂掩模蚀刻电介质层。

3. 发明申请

WO2005091974A3 METHODS FOR THE OPTIMIZATION OF SUBSTRATE ETCHING IN A PLASMA PROCESSING SYSTEM 审中-公开
标题翻译：在等离子体处理系统中优化基板蚀刻的方法
公开(公告)号：WO2005091974A3
公开(公告)日：2006-09-21
申请号：PCT/US2005007886
申请日：2005-03-09
申请人： LAM RES CORP , KIM JISOO , WORSHAM BINET , YEN BI-MING , LOEWENHARDT PETER K
发明人： KIM JISOO , WORSHAM BINET , YEN BI-MING , LOEWENHARDT PETER K
IPC分类号： C23F1/00 , B44C1/22 , C03C15/00 , H01L21/302 , H01L21/311 , H01L21/768
CPC分类号： H01L21/31144 , H01L21/76811 , H01L21/76813
摘要： A method of etching a substrate in a plasma processing system is disclosed. The substrate has a semi-conductor layer, a first barrier layer disposed above the semi-conductor layer, a low-k layer disposed above the first barrier layer, a third hard mask layer disposed above the low-k layer; a second hard mask layer disposed above the third hard mask layer, and a first hard mask layer disposed above the second hard mask layer. The method includes alternatively etching the substrate with a first etchant and a second etchant, wherein the first etchant has a low selectivity to a first hard mask material of the first hard mask layer, a third hard mask material of the a third hard mask layer, and a first barrier layer material of the first barrier layer, but a high selectivity to a second hard mask material of the second hard mask layer; and wherein the second etchant has a high selectivity to the first hard mask material of the first hard mask layer, the third hard mask material of the third hard mask layer, and the first barrier layer material of the first barrier layer, and the first etchant has a low selectivity to the second hard mask material of the second hard mask layer.
摘要翻译：公开了一种在等离子体处理系统中蚀刻衬底的方法。衬底具有半导体层，设置在半导体层上方的第一势垒层，设置在第一阻挡层上方的低k层，设置在低k层上方的第三硬掩模层; 设置在第三硬掩模层之上的第二硬掩模层，以及设置在第二硬掩模层上方的第一硬掩模层。所述方法包括用第一蚀刻剂和第二蚀刻剂替代地蚀刻所述衬底，其中所述第一蚀刻剂对所述第一硬掩模层的第一硬掩模材料具有低选择性，所述第三硬掩模层的第三硬掩模材料，和第一阻挡层的第一阻挡层材料，但对第二硬掩模层的第二硬掩模材料具有高选择性; 并且其中第二蚀刻剂对第一硬掩模层的第一硬掩模材料，第三硬掩模层的第三硬掩模材料和第一阻挡层的第一阻挡层材料和第一蚀刻剂具有高选择性对第二硬掩模层的第二硬掩模材料具有低选择性。

4. 发明申请

WO2005091974A2 METHODS FOR THE OPTIMIZATION OF SUBSTRATE ETCHING IN A PLASMA PROCESSING SYSTEM 审中-公开
标题翻译：一种等离子体处理系统中基片蚀刻的优化方法
公开(公告)号：WO2005091974A2
公开(公告)日：2005-10-06
申请号：PCT/US2005/007886
申请日：2005-03-09
申请人： LAM RESEARCH CORPORATION , KIM, Jisoo , WORSHAM, Binet , YEN, Bi-Ming , LOEWENHARDT, Peter K.
发明人： KIM, Jisoo , WORSHAM, Binet , YEN, Bi-Ming , LOEWENHARDT, Peter K.
IPC分类号： B44C1/22 , C03C15/00 , C23F1/00 , H01L21/302 , H01L21/311 , H01L21/768
CPC分类号： H01L21/31144 , H01L21/76811 , H01L21/76813
摘要： A method of etching a substrate in a plasma processing system is disclosed. The substrate has a semi-conductor layer, a first barrier layer disposed above the semi-conductor layer, a low-k layer disposed above the first barrier layer, a third hard mask layer disposed above the low-k layer; a second hard mask layer disposed above the third hard mask layer, and a first hard mask layer disposed above the second hard mask layer. The method includes alternatively etching the substrate with a first etchant and a second etchant, wherein the first etchant has a low selectivity to a first hard mask material of the first hard mask layer, a third hard mask material of the a third hard mask layer, and a first barrier layer material of the first barrier layer, but a high selectivity to a second hard mask material of the second hard mask layer; and wherein the second etchant has a high selectivity to the first hard mask material of the first hard mask layer, the third hard mask material of the third hard mask layer, and the first barrier layer material of the first barrier layer, and the first etchant has a low selectivity to the second hard mask material of the second hard mask layer.
摘要翻译：公开了一种在等离子体处理系统中蚀刻衬底的方法。衬底具有半导体层，设置在半导体层上方的第一阻挡层，设置在第一阻挡层上方的低k层，设置在低k层上方的第三硬掩模层，设置在第三硬掩模层上方的第二硬掩模层以及设置在第二硬掩模层上方的第一硬掩模层。该方法包括用第一蚀刻剂和第二蚀刻剂交替地蚀刻衬底，其中第一蚀刻剂对第一硬掩模层的第一硬掩模材料，第三硬掩模层的第三硬掩模材料，以及第一阻挡层的第一阻挡层材料，但对第二硬掩模层的第二硬掩模材料具有高选择性; 且其中所述第二蚀刻剂对所述第一硬掩模层的所述第一硬掩模材料，所述第三硬掩模层的所述第三硬掩模材料以及所述第一势垒层的所述第一势垒层材料具有高选择性，并且所述第一蚀刻剂对第二硬掩模层的第二硬掩模材料具有低选择性。

5. 发明申请

WO2006104655A3 ETCH WITH PHOTORESIST MASK 审中-公开
公开(公告)号：WO2006104655A3
公开(公告)日：2006-10-05
申请号：PCT/US2006/008306
申请日：2006-03-07
申请人： LAM RESEARCH CORPORATION , KIM, Jisoo , LEE, Sangheon , WORSHAM, Binet, A. , CHARATAN, Robert , SADJADI, S.M., Reza
发明人： KIM, Jisoo , LEE, Sangheon , WORSHAM, Binet, A. , CHARATAN, Robert , SADJADI, S.M., Reza
IPC分类号： H01L21/311
摘要： A method for etching a dielectric layer over a substrate is provided. A photoresist mask is formed over the dielectric layer. The substrate is placed in a plasma processing chamber. An etchant gas comprising NF 3 is provided into the plasma chamber. A plasma is formed from the NF 3 gas. The dielectric layer is etched through the photoresist mask with the plasma from the NF 3 gas.

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