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1. 发明申请

WO2007139610A1 INDEXING DOCUMENTS FOR INFORMATION RETRIEVAL 审中-公开
标题翻译：索引信息检索文件
公开(公告)号：WO2007139610A1
公开(公告)日：2007-12-06
申请号：PCT/US2007/006600
申请日：2007-03-15
申请人： MICROSOFT CORPORATION , TAYLOR, Michael J. , ROBERTSON, Stephen , WILLIAMS, Hugh E. , CRASWELL, Nicholas E.
发明人： TAYLOR, Michael J. , ROBERTSON, Stephen , WILLIAMS, Hugh E. , CRASWELL, Nicholas E.
IPC分类号： G06F17/30 , G06F17/21
CPC分类号： G06F17/30648 , G06F17/30864
摘要： Information retrieval systems such as web search systems locate documents amongst millions and even billions of possible documents on the basis of query terms. In order to achieve this document indexes are created. We propose creating new fields in the documents to store feedback information. This information comprises query terms used in a particular search as well as information about whether a particular document retrieved is given positive or negative feedback for example. Indexes are created on the basis of this feedback information in addition to other available information. As a result relevance of search results is improved. Multiple fields of information are available for given documents (such as abstract fields, title fields, anchor text fields as well as our feedback fields). Any search algorithm which deals with multiple fields as well as multiple query terms and which provides for differential weighting of document fields is used.
摘要翻译：诸如网络搜索系统之类的信息检索系统基于查询条件在数百万甚至数十亿的可能的文档之间找到文档。为了实现这个文件索引的创建。我们建议在文档中创建新的字段来存储反馈信息。该信息包括在特定搜索中使用的查询词，以及关于被检索的特定文档是否被给予正或负反馈的信息。索引是基于此反馈信息创建的，除了其他可用信息。因此，搜索结果的相关性得到改善。多个信息领域可用于给定的文档（例如抽象字段，标题字段，锚文本字段以及我们的反馈字段）。使用任何处理多个字段的搜索算法以及多个查询项，并提供文档字段的差分加权。

2. 发明申请

WO2011022066A3 WALL MOUNT ELECTRICAL BOX 审中-公开
标题翻译：墙壁电气箱
公开(公告)号：WO2011022066A3
公开(公告)日：2011-07-07
申请号：PCT/US2010002289
申请日：2010-08-20
申请人： TAYLOR MICHAEL J
发明人： TAYLOR MICHAEL J
IPC分类号： H02G3/10 , H02G3/14
CPC分类号： H02G3/123 , Y10S248/906
摘要： An electrical box mountable within a wall and installable from outside the wall. The box has a pan that includes a front flange for contacting an outer wall surface that extends outwardly from a sidewall. A back bracket is positioned opposite the front flange and adjacent to the back wall and a fastener having a shaft extends through the back wall to movably secure the back bracket to the back wall. No portion of the shaft extends behind the back bracket. The back bracket is movable relative to the pan between a first position adjacent to the back wall and a second position spaced farther from the back wall. The bracket and front flange are adapted for clamping a portion of a wall located between the front flange and back bracket when the back bracket is in its first position.
摘要翻译：电箱可安装在墙内并可从墙外安装。盒子具有包括前凸缘的盘，该前凸缘用于接触从侧壁向外延伸的外壁表面。后支架定位成与前凸缘相对且邻近后壁，并且具有轴的紧固件延伸穿过后壁以将后支架可移动地固定到后壁。轴的任何部分都不在后支架后面延伸。靠背支架可在邻近后壁的第一位置和远离后壁间隔的第二位置之间相对于平底锅移动。支架和前凸缘适于在后支架处于其第一位置时夹持位于前凸缘和后支架之间的壁的一部分。

3. 发明申请

WO2012054811A1 CULTURED PANCREAS ISLETS 审中-公开
标题翻译：培养的胰蛋白酶
公开(公告)号：WO2012054811A1
公开(公告)日：2012-04-26
申请号：PCT/US2011/057234
申请日：2011-10-21
申请人： CELL & TISSUE SYSTEMS, INC. , TAYLOR, Michael J. , BAICU, Simona C.
发明人： TAYLOR, Michael J. , BAICU, Simona C.
IPC分类号： C12N5/071
CPC分类号： C12N5/0677 , C12N2500/00
摘要： Methods of preparing pancreatic islets that may comprise pancreatites are provided. The methods may involve subjecting a pancreas and/or pieces thereof to disruption, such as, for example, an enzyme digest, and seeding the recovered cellular product comprising islets in a culture medium comprising at least a detectable amount of endocrine tissue and/or exocrine tissue.
摘要翻译：提供了可能包含胰腺的胰岛的制备方法。所述方法可以包括使胰腺和/或其碎片受到破坏，例如酶消化，并将包含胰岛的回收的细胞产物接种在包含至少可检测量的内分泌组织和/或外分泌的培养基中组织。

4. 发明申请

WO2011153499A1 SYSTEMS AND METHODS OF MANUFACTURING PRINTED CIRCUIT BOARDS USING BLIND AND INTERNAL MICRO VIAS TO COUPLE SUBASSEMBLIES 审中-公开
标题翻译：使用黑色和内部微型VIAS制作印刷电路板的系统和方法
公开(公告)号：WO2011153499A1
公开(公告)日：2011-12-08
申请号：PCT/US2011/039171
申请日：2011-06-03
申请人： DDI GLOBAL CORP. , KUMAR, Rajesh , DREYER, Monte, P. , TAYLOR, Michael, J.
发明人： KUMAR, Rajesh , DREYER, Monte, P. , TAYLOR, Michael, J.
IPC分类号： H01L23/10
CPC分类号： H05K3/4623 , H05K3/4069 , H05K3/4614 , H05K2201/0195 , H05K2201/096 , H05K2203/061 , Y10T29/49124 , Y10T29/49126 , Y10T29/49146 , Y10T29/49165 , Y10T29/532
摘要： Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies. An embodiment of the invention provides a method of manufacturing a printed circuit including attaching a plurality of metal layer carriers to form a first subassembly including at least one copper foil pad on a first surface, applying an encapsulation material onto the first surface of the first subassembly, curing the encapsulation material and the first subassembly; applying a lamination adhesive to a surface of the cured encapsulation material, forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad, attaching a plurality of metal layer carriers to form a second subassembly, and attaching the first subassembly and the second subassembly.
摘要翻译：使用盲孔和内部微通孔来制造印刷电路板来耦合子组件的系统和方法。本发明的一个实施例提供一种制造印刷电路的方法，包括附接多个金属层载体以形成第一子组件，该第一子组件包括在第一表面上的至少一个铜箔焊盘，将封装材料施加到第一子组件的第一表面上固化封装材料和第一子组件; 在所述固化的包封材料的表面上施加层压粘合剂，在所述层压粘合剂和所述固化的封装材料中形成至少一个通孔，以暴露所述至少一个铜箔垫，附接多个金属层载体以形成第二子组件，以及附接第一子组件和第二子组件。

5. 发明申请

WO2011136817A1 METHODS OF MANUFACTURING PRINTED CIRCUIT BOARDS USING PARALLEL PROCESSES TO INTERCONNECT WITH SUBASSEMBLIES 审中-公开
标题翻译：使用并行处理与印制电路板连接的方法制作印刷电路板
公开(公告)号：WO2011136817A1
公开(公告)日：2011-11-03
申请号：PCT/US2010/033295
申请日：2010-04-30
申请人： DDI GLOBAL CORP , KUMAR, Rajesh , DREYER, Monte, P. , TAYLOR, Michael, J.
发明人： KUMAR, Rajesh , DREYER, Monte, P. , TAYLOR, Michael, J.
IPC分类号： H05K1/16
CPC分类号： H05K3/4623 , H05K3/4069 , H05K3/4617 , H05K2201/09527 , H05K2201/096 , H05K2203/061
摘要： Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies are provided. In one embodiment, the invention relates to a method of manufacturing a printed circuit board including providing a core subassembly including at least one metal layer, providing a plurality of one-metal layer carriers after parallel processing each of the plurality of one-metal layer carriers, and attaching at least two of the plurality of one-metal layer carriers with each other and with the core subassembly.
摘要翻译：提供了使用并行处理来与子组件互连的印刷电路板的制造方法。在一个实施例中，本发明涉及一种制造印刷电路板的方法，其包括提供包括至少一个金属层的芯子组件，在并行处理多个单金属层载体中的每一个之后提供多个单金属层载体并且将所述多个一金属层载体中的至少两个彼此并且与所述芯子组件相连。

6. 发明申请

WO2011022066A2 WALL MOUNT ELECTRICAL BOX 审中-公开
标题翻译：壁装电箱
公开(公告)号：WO2011022066A2
公开(公告)日：2011-02-24
申请号：PCT/US2010/002289
申请日：2010-08-20
申请人： TAYLOR, Michael, J.
发明人： TAYLOR, Michael, J.
IPC分类号： H02G3/10 , H02G3/14
CPC分类号： H02G3/123 , Y10S248/906
摘要： An electrical box mountable within a wall and installable from outside the wall. The box has a pan that includes a front flange for contacting an outer wall surface that extends outwardly from a sidewall. A back bracket is positioned opposite the front flange and adjacent to the back wall and a fastener having a shaft extends through the back wall to movably secure the back bracket to the back wall. No portion of the shaft extends behind the back bracket. The back bracket is movable relative to the pan between a first position adjacent to the back wall and a second position spaced farther from the back wall. The bracket and front flange are adapted for clamping a portion of a wall located between the front flange and back bracket when the back bracket is in its first position.
摘要翻译：可安装在墙壁内并可从墙外安装的电气箱。该箱具有一个盘，其包括用于接触从侧壁向外延伸的外壁表面的前凸缘。后支架定位成与前凸缘相对并且邻近后壁，并且具有轴的紧固件延伸穿过后壁以将后支架可移动地固定到后壁。轴的任何部分都不会延伸到后支架的后面。后支架可相对于所述盘在相邻于所述后壁的第一位置和远离所述后壁的第二位置之间移动。当后支架处于其第一位置时，支架和前凸缘适于夹紧位于前凸缘和后支架之间的壁的一部分。

7. 发明申请

WO2010019820A1 ADDITIONAL FUNCTIONALITY SINGLE LAMMINATION STACKED VIA WITH PLATED THROUGH HOLES FOR MULTILAYER PRINTED CIRCUIT BOARDS 审中-公开
标题翻译：通过多层打印电路板插入的附加功能性单一打包
公开(公告)号：WO2010019820A1
公开(公告)日：2010-02-18
申请号：PCT/US2009/053783
申请日：2009-08-13
申请人： DYNAMIC DETAILS, INC. , KUMAR, Raj , DREYER, Monte , TAYLOR, Michael, J. , ZEPEDA, Ruben
发明人： KUMAR, Raj , DREYER, Monte , TAYLOR, Michael, J. , ZEPEDA, Ruben
IPC分类号： H05K1/11 , H05K1/03
CPC分类号： H05K3/4614 , H05K3/386 , H05K3/4069 , H05K3/427 , H05K3/429 , H05K3/462 , H05K3/4623 , H05K2201/0195 , H05K2201/0352 , H05K2201/09454 , H05K2201/09563 , H05K2201/096 , H05K2201/09736 , H05K2201/09845 , H05K2203/0191 , H05K2203/0554 , H05K2203/061 , H05K2203/1152 , Y10T29/49128 , Y10T29/49156 , Y10T29/49165
摘要： Methods of manufacturing at least a portion of a printed circuit board. The circuit board is formed to include a plurality of sub-assemblies, each of the sub-assemblies including a plurality of circuit layers and having at least one countersink and at least one hole, the countersink having a first diameter and a first depth from a first side of at least one of the sub-assemblies and into the at least one sub-assembly, the hole having a second diameter smaller than the first diameter and a second depth longer than the first depth from the first side of the at least one sub-assembly and into the at least one sub-assembly at the countersink; a metal metalized within the hole and the countersink; a lamination adhesive interposed between one and a corresponding one of the sub-assemblies and having at least one via formed there through; and a counter paste filled within the via.
摘要翻译：制造印刷电路板的至少一部分的方法。电路板形成为包括多个子组件，每个子组件包括多个电路层并且具有至少一个埋头孔和至少一个孔，该埋头孔具有第一直径和从第一深度至少一个子组件的第一侧并且进入至少一个子组件，该孔具有小于第一直径的第二直径和比从至少一个子组件的第一侧的第一深度更长的第二深度子组件并进入至少一个子组件在锪孔处; 孔内金属化和埋头孔; 插入在一个和相应的一个子组件之间且在其中形成有至少一个通孔的层压粘合剂; 以及填充在通孔内的计数器糊状物。

8. 发明申请

WO2007124146A8 PRINTED CIRCUIT BOARDS WITH STACKED MICROS VIAS 审中-公开
标题翻译：带有堆叠微型VIAS的印刷电路板
公开(公告)号：WO2007124146A8
公开(公告)日：2008-12-18
申请号：PCT/US2007009819
申请日：2007-04-19
申请人： DYNAMIC DETAILS INC , KUMAR RAJ , DREYER MONTE , TAYLOR MICHAEL J
发明人： KUMAR RAJ , DREYER MONTE , TAYLOR MICHAEL J
IPC分类号： H05K1/00 , B32B3/00 , B32B15/08 , H05K1/03 , H05K1/16
CPC分类号： H05K3/4623 , H05K3/205 , H05K3/386 , H05K3/4069 , H05K3/423 , H05K3/4614 , H05K3/4617 , H05K3/462 , H05K2201/0355 , H05K2201/0394 , H05K2201/09309 , H05K2201/096 , H05K2203/0191 , H05K2203/0271 , H05K2203/0502 , H05K2203/061 , H05K2203/0733 , H05K2203/107 , H05K2203/1461 , H05K2203/1536 , H05K2203/304 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： Printed circuit boards having circuit layers laminated with stacked (or staggered) micro via(s) and methods of manufacturing the same. Aspects of embodiments of the present invention are directed to a printed circuit board with Z-axis interconnect(s) or micro via(s) that can eliminate a need for plating micro vias and/or eliminate a need for planarizing plated bumps of a surface, that can be fabricated with one or two lamination cycles, and/or that can have carrier-to-carrier (or substrate-to-substrate) attachments with conductive vias, each filled with a conductive material (e.g., with a conductive paste) in the Z-axis. In one embodiment, a printed circuit board having a plurality of circuit layers with at least one z-axis interconnect can be fabricated using a single lamination cycle.
摘要翻译：具有层叠（或交错）微通孔的电路层的印刷电路板及其制造方法。本发明的实施例的方面涉及具有Z轴互连或微通孔的印刷电路板，所述印刷电路板可以消除对微通孔镀敷的需要和/或消除平面化表面的镀凸块的需要，其可以用一个或两个层压循环制造，和/或可以具有导电通孔的载体与载体（或衬底与衬底）附接件，每个导电通孔填充有导电材料（例如，用导电浆料）在Z轴上。在一个实施例中，具有多个具有至少一个z轴互连的电路层的印刷电路板可以使用单个层压周期来制造。

9. 发明申请

WO2007124146A3 PRINTED CIRCUIT BOARDS WITH STACKED MICROS VIAS 审中-公开
标题翻译：带有堆叠MICROS VIAS的印刷电路板
公开(公告)号：WO2007124146A3
公开(公告)日：2008-10-16
申请号：PCT/US2007009819
申请日：2007-04-19
申请人： DYNAMIC DETAILS INC , KUMAR RAJ , DREYER MONTE , TAYLOR MICHAEL J
发明人： KUMAR RAJ , DREYER MONTE , TAYLOR MICHAEL J
IPC分类号： H05K1/00 , B32B3/00 , B32B15/08 , H05K1/03 , H05K1/16
CPC分类号： H05K3/4623 , H05K3/205 , H05K3/386 , H05K3/4069 , H05K3/423 , H05K3/4614 , H05K3/4617 , H05K3/462 , H05K2201/0355 , H05K2201/0394 , H05K2201/09309 , H05K2201/096 , H05K2203/0191 , H05K2203/0271 , H05K2203/0502 , H05K2203/061 , H05K2203/0733 , H05K2203/107 , H05K2203/1461 , H05K2203/1536 , H05K2203/304 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： Printed circuit boards having circuit layers laminated with stacked (or staggered) micro via(s) and methods of manufacturing the same. Aspects of embodiments of the present invention are directed to a printed circuit board with Z-axis interconnect(s) or micro via(s) that can eliminate a need for plating micro vias and/or eliminate a need for planarizing plated bumps of a surface, that can be fabricated with one or two lamination cycles, and/or that can have carrier-to-carrier (or substrate-to-substrate) attachments with conductive vias, each filled with a conductive material (e.g., with a conductive paste) in the Z-axis. In one embodiment, a printed circuit board having a plurality of circuit layers with at least one z-axis interconnect can be fabricated using a single lamination cycle.
摘要翻译：具有层叠有（或交错）微通道的电路层的印刷电路板及其制造方法。本发明的实施例的方面涉及具有Z轴互连或微通道的印刷电路板，其可以消除对电镀微通孔的需要和/或消除对平面化电镀凸块的需要，可以用一个或两个层压循环制造，和/或可以具有导电通孔的载流子到载体（或基底对基底）附件，每个填充有导电材料（例如，使用导电浆料）在Z轴上。在一个实施例中，可以使用单个层压循环来制造具有具有至少一个z轴互连的多个电路层的印刷电路板。

10. 发明申请

WO2007124146A2 PRINTED CIRCUIT BOARDS WITH STACKED MICROS VIAS 审中-公开
标题翻译：带有堆叠MICROS VIAS的印刷电路板
公开(公告)号：WO2007124146A2
公开(公告)日：2007-11-01
申请号：PCT/US2007/009819
申请日：2007-04-19
申请人： DYNAMIC DETAILS, INC. , KUMAR, Raj , DREYER, Monte , TAYLOR, Michael, J.
发明人： KUMAR, Raj , DREYER, Monte , TAYLOR, Michael, J.
IPC分类号： H05K1/11
CPC分类号： H05K3/4623 , H05K3/205 , H05K3/386 , H05K3/4069 , H05K3/423 , H05K3/4614 , H05K3/4617 , H05K3/462 , H05K2201/0355 , H05K2201/0394 , H05K2201/09309 , H05K2201/096 , H05K2203/0191 , H05K2203/0271 , H05K2203/0502 , H05K2203/061 , H05K2203/0733 , H05K2203/107 , H05K2203/1461 , H05K2203/1536 , H05K2203/304 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： Printed circuit boards having circuit layers laminated with stacked (or staggered) micro via(s) and methods of manufacturing the same. Aspects of embodiments of the present invention are directed to a printed circuit board with Z-axis interconnect(s) or micro via(s) that can eliminate a need for plating micro vias and/or eliminate a need for planarizing plated bumps of a surface, that can be fabricated with one or two lamination cycles, and/or that can have carrier-to-carrier (or substrate-to-substrate) attachments with conductive vias, each filled with a conductive material (e.g., with a conductive paste) in the Z-axis. In one embodiment, a printed circuit board having a plurality of circuit layers with at least one z-axis interconnect can be fabricated using a single lamination cycle.
摘要翻译：具有层叠有（或交错）微通道的电路层的印刷电路板及其制造方法。本发明的实施例的方面涉及具有Z轴互连或微通道的印刷电路板，其可以消除对电镀微通孔的需要和/或消除对平面化电镀凸块的需要，可以用一个或两个层压循环制造，和/或可以具有导电通孔的载流子到载体（或基底对基底）附件，每个填充有导电材料（例如，使用导电浆料）在Z轴上。在一个实施例中，可以使用单个层压循环来制造具有具有至少一个z轴互连的多个电路层的印刷电路板。

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