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1. 发明申请

WO2013095385A1 APPARATUS AND METHOD FOR PHASE CHANGE MEMORY DRIFT MANAGEMENT 审中-公开
标题翻译：相位变化管理的设备和方法
公开(公告)号：WO2013095385A1
公开(公告)日：2013-06-27
申请号：PCT/US2011/066179
申请日：2011-12-20
申请人： INTEL CORPORATION , RAMANUJAN, Raj K. , SCHMISSEUR, Mark A.
发明人： RAMANUJAN, Raj K. , SCHMISSEUR, Mark A.
IPC分类号： G11C13/02 , G06F12/00
CPC分类号： G06F12/0246 , G06F12/0866 , G06F2212/214 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C16/3418 , G11C2013/0054 , G11C2013/0057
摘要： A system and method are described for selecting a demarcation voltage for read and write operations. Embodiments of the invention provide a scheme to use multiple VDMs to cover the case where power-on drift is different from power-off drift of the PCMS cells. The controller automatically manages this through tracking refreshes and writes. In addition, the embodiments of the invention provide an efficient scheme to reduce the performance impact of the penalty box following a write by tracking recent write addresses through a hash-table or similar scheme. By way of example, a method in accordance with one embodiment comprises: detecting a read operation directed to a first block of a PCMS memory; determining whether a write operation has previously occurred to the first block within a specified amount of time prior to the read operation; using a first demarcation voltage (VDM) for the read operation if the write operation has previously occurred to the first block within the specified amount of time prior to the write operation; and using a second VDM for the read operation if the write operation has not previously occurred to the first block within the specified amount of time prior to the write or refresh operation.
摘要翻译：描述了用于选择用于读取和写入操作的分界电压的系统和方法。本发明的实施例提供了使用多个VDM来覆盖上电漂移与PCMS单元的断电漂移不同的情况的方案。控制器通过跟踪刷新和写入自动进行管理。此外，本发明的实施例提供了一种有效的方案，以通过通过散列表或类似方案跟踪最近的写入地址来减少写入之后的惩罚盒的性能影响。作为示例，根据一个实施例的方法包括：检测针对PCMS存储器的第一块的读取操作; 在所述读取操作之前的指定时间内确定是否先前对所述第一块发生了写入操作; 如果在写操作之前的指定时间内先前已经对第一块发生写操作，则使用第一分界电压（VDM）作为读操作; 以及如果在所述写入或刷新操作之前的所述指定时间量内的所述第一块以前没有发生写入操作，则使用第二VDM进行所述读取操作。

2. 发明申请

WO2013006388A3 EFFICIENT AND SCALABLE CYCLIC REDUNDANCY CHECK CIRCUIT USING GALOIS-FIELD ARITHMETIC 审中-公开
公开(公告)号：WO2013006388A3
公开(公告)日：2013-01-10
申请号：PCT/US2012/044735
申请日：2012-06-28
申请人： INTEL CORPORATION , RADHAKRISHNAN, Sivakumar , SCHMISSEUR, Mark A. , TAN, Sin S. , HAREN, Kenneth C. , BROWN, Thomas C. , KUMAR, Pankaj , GOPAL, Vinodh , FEGHALI, Wajdi K.
发明人： RADHAKRISHNAN, Sivakumar , SCHMISSEUR, Mark A. , TAN, Sin S. , HAREN, Kenneth C. , BROWN, Thomas C. , KUMAR, Pankaj , GOPAL, Vinodh , FEGHALI, Wajdi K.
IPC分类号： G06F11/10
摘要： Embodiments of the present disclosure describe methods, apparatus, and system configurations for cyclic redundancy check circuits using Galois-field arithmetic.

3. 发明申请

WO2015047266A1 BLOCK STORAGE APERTURES TO PERSISTENT MEMORY 审中-公开
标题翻译：对存储记忆的存储存储空间
公开(公告)号：WO2015047266A1
公开(公告)日：2015-04-02
申请号：PCT/US2013/061841
申请日：2013-09-26
申请人： INTEL CORPORATION , SCHMISSEUR, Mark A. , RUDOFF, Andy M. , NACHIMUTHU, Murugasamy , NATU, Mahesh S. , MANGOLD, Richard P. , STEWART, Douglas D.
发明人： SCHMISSEUR, Mark A. , RUDOFF, Andy M. , NACHIMUTHU, Murugasamy , NATU, Mahesh S. , MANGOLD, Richard P. , STEWART, Douglas D.
IPC分类号： G06F13/16
CPC分类号： G06F12/10 , G06F3/061 , G06F3/0622 , G06F3/0659 , G06F3/0679 , G06F11/073 , G06F11/0772 , G06F12/0246 , G06F12/1408 , G06F12/1441 , G06F13/1668 , G06F2212/1052 , G06F2212/202 , G06F2212/2022 , G06F2212/402 , G06F2212/7201
摘要： Apparatus and methods for accessing a non-volatile memory (NVM) device in a computer system that includes at least one host processor and at least one memory bus. The NVM device is communicably coupleable to the memory bus through an NVM device controller, thereby allowing the host processor to access persistent data storable within the NVM device by issuing one or more memory load/store commands to the NVM device controller over the memory bus. Because the NVM device controller includes at least one block window or aperture that defines at least one address range for accessing the persistent data storable within the NVM device, the computer system can exploit the full capacity of the NVM device without being unduly constrained by physical addressing limits imposed by the host processor, or by limits imposed by an operating system executed by the host processor.
摘要翻译：用于访问包括至少一个主处理器和至少一个存储器总线的计算机系统中的非易失性存储器（NVM）设备的装置和方法。 NVM设备通过NVM设备控制器可通信地耦合到存储器总线，从而允许主机处理器通过在存储器总线上向NVM设备控制器发出一个或多个存储器加载/存储命令来访问可存储在NVM设备内的持久数据。因为NVM设备控制器包括至少一个限定了至少一个地址范围的块窗口或孔径，用于访问可存储在NVM设备内的持久数据，所以计算机系统可以利用NVM设备的全部容量，而不会被物理寻址过度约束由主处理器施加的限制，或由主处理器执行的操作系统施加的限制。

4. 发明申请

WO2014099025A1 TECHNIQUES TO CONFIGURE A SOLID STATE DRIVE TO OPERATE IN A STORAGE MODE OR A MEMORY MODE 审中-公开
标题翻译：配置固态驱动器在存储模式或存储器模式下运行的技术
公开(公告)号：WO2014099025A1
公开(公告)日：2014-06-26
申请号：PCT/US2013/048414
申请日：2013-06-28
申请人： INTEL CORPORATION , FANNING, Blaise , SCHMISSEUR, Mark, A. , TETRICK, Raymond, S. , ROYER, Robert, J. , MINTURN, David, B. , MATTHEWS, Shane
发明人： FANNING, Blaise , SCHMISSEUR, Mark, A. , TETRICK, Raymond, S. , ROYER, Robert, J. , MINTURN, David, B. , MATTHEWS, Shane
IPC分类号： G06F13/14 , G06F12/00
CPC分类号： G06F3/0604 , G06F3/0629 , G06F3/0632 , G06F3/0634 , G06F3/0644 , G06F3/0664 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F13/16 , G06F13/28 , G06F2212/7206
摘要： Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.
摘要翻译：公开了用于配置固态驱动器（SSD）以在存储模式或存储器模式下操作的示例。在一些示例中，可以在具有一个或多个非易失性存储器阵列的SSD的控制器处接收一个或多个配置命令。 SSD可以被配置为基于一个或多个配置命令以存储模式，存储模式或者存储模式或存储器模式的组合中的至少一个进行操作。其他的例子被描述和要求保护。

5. 发明申请

WO2013101158A1 METADATA MANAGEMENT AND SUPPORT FOR PHASE CHANGE MEMORY WITH SWITCH (PCMS) 审中-公开
标题翻译：元数据管理和支持相位变化记忆与开关（PCMS）
公开(公告)号：WO2013101158A1
公开(公告)日：2013-07-04
申请号：PCT/US2011/068040
申请日：2011-12-30
申请人： INTEL CORPORATION , PUTHIYEDATH, Leena, K. , JONES, Marc, T. , TETRICK, Scott, R. , ROYER, Robert, J., Jr. , RAMANUJAN, Raj, K. , HINTON, Glenn, J. , FANNING, Blaise , GITTINS, Robert, S. , SCHMISSEUR, Mark, A. , HADY, Frank, T. , FABER, Robert, W.
发明人： PUTHIYEDATH, Leena, K. , JONES, Marc, T. , TETRICK, Scott, R. , ROYER, Robert, J., Jr. , RAMANUJAN, Raj, K. , HINTON, Glenn, J. , FANNING, Blaise , GITTINS, Robert, S. , SCHMISSEUR, Mark, A. , HADY, Frank, T. , FABER, Robert, W.
IPC分类号： G06F12/00 , G06F13/14 , G06F11/08 , G11C13/02
CPC分类号： G11C16/3431 , G06F11/1048 , G06F12/0246 , G11C13/0004 , G11C14/0045
摘要： Methods and apparatus related to management and/or support of metadata for PCMS (Phase Change Memory with Switch) devices are described. In one embodiment, a PCMS controller allows access to a PCMS device based on metadata. The metadata may be used to provide efficiency, endurance, error correction, etc. as discussed in the disclosure. Other embodiments are also disclosed and claimed.
摘要翻译：描述了与用于PCMS（带有交换机的相变存储器））元件的管理和/或支持相关的方法和装置。在一个实施例中，PCMS控制器允许基于元数据访问PCMS设备。可以使用元数据来提供如本公开中所讨论的效率，耐久性，纠错等。还公开并要求保护其他实施例。

6. 发明申请

WO2013048487A1 METHOD, SYSTEM AND APPARATUS FOR REGION ACCESS CONTROL 审中-公开
标题翻译：方法，用于区域访问控制的系统和设备
公开(公告)号：WO2013048487A1
公开(公告)日：2013-04-04
申请号：PCT/US2011/054409
申请日：2011-09-30
申请人： INTEL CORPORATION , ALTMAN, Asher M. , SCHMISSEUR, Mark A. , SWANSON, Robert C. , SLAIGHT, Thomas M.
发明人： ALTMAN, Asher M. , SCHMISSEUR, Mark A. , SWANSON, Robert C. , SLAIGHT, Thomas M.
IPC分类号： G06F12/00 , G06F9/22 , G06F9/06 , G06F13/14
CPC分类号： G06F12/14 , G06F3/0622 , G06F3/0667 , G06F3/0679 , G06F9/545 , G06F21/6281
摘要： Techniques and mechanisms for providing access to a storage device of a computer platform. In an embodiment, an agent executing on the platform may be registered for access to the storage device, the agent being allocated a memory space by a host operating system of the platform. Registration of the agent may result in a location in the allocated memory space being mapped to a location in the storage device. In another embodiment, the agent may write to the location in the allocated memory space to request access to the storage device, wherein the request is independent of any system call to the host OS which describes the requested access.
摘要翻译：用于提供对计算机平台的存储设备的访问的技术和机制。在一个实施例中，可以登记在平台上执行的代理以访问存储设备，代理由平台的主机操作系统分配存储空间。代理的注册可能导致分配的存储器空间中的位置被映射到存储设备中的位置。在另一个实施例中，代理可以写入分配的存储器空间中的位置以请求对存储设备的访问，其中该请求独立于描述所请求的访问的对主机OS的任何系统调用。

7. 发明申请

WO2013006388A2 EFFICIENT AND SCALABLE CYCLIC REDUNDANCY CHECK CIRCUIT USING GALOIS-FIELD ARITHMETIC 审中-公开
标题翻译：有效可扩展的循环冗余校验电路使用伽罗欧斯场算术
公开(公告)号：WO2013006388A2
公开(公告)日：2013-01-10
申请号：PCT/US2012044735
申请日：2012-06-28
申请人： INTEL CORP , RADHAKRISHNAN SIVAKUMAR , SCHMISSEUR MARK A , TAN SIN S , HAREN KENNETH C , BROWN THOMAS C , KUMAR PANKAJ , GOPAL VINODH , FEGHALI WAJDI K
发明人： RADHAKRISHNAN SIVAKUMAR , SCHMISSEUR MARK A , TAN SIN S , HAREN KENNETH C , BROWN THOMAS C , KUMAR PANKAJ , GOPAL VINODH , FEGHALI WAJDI K
CPC分类号： G06F11/10 , G06F11/1076 , H03M1/1052 , H03M7/42 , H03M13/09 , H03M13/091 , H03M13/158 , H03M13/6575
摘要： Embodiments of the present disclosure describe methods, apparatus, and system configurations for cyclic redundancy check circuits using Galois-field arithmetic.
摘要翻译：本公开的实施例描述了使用伽罗瓦域算术的循环冗余校验电路的方法，装置和系统配置。

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