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    • 4. 发明申请
    • SIDE TRENCH ISOLATION METHOD USING A TWO-COMPONENT PROTECTIVE LAYER OF POLYSILICON ON SILICON NITRIDE FOR INSULATOR LAYER PLANARISATION BY CHEMICAL-MECHANICAL POLISHING
    • 采用化学机械抛光法制备绝缘子层平面硅氮化硅的双组分保护层的侧向分离方法
    • WO1997019467A1
    • 1997-05-29
    • PCT/FR1996001844
    • 1996-11-21
    • FRANCE TELECOMBROUQUET, PierreMASUREL, ClaudeRIVOIRE, Maurice
    • FRANCE TELECOM
    • H01L21/762
    • H01L21/76229H01L21/31053
    • A method for isolating the working areas of a semiconductor substrate using side trenches, wherein (a) a two-component protective layer (3) consisting of silicon nitride and polysilicon is deposited on the semiconductor substrate, (b) trenches (7) are provided in the semiconductor substrate (1) alongside predetermined areas (6) of the substrate (1) that are covered with the protective layer (3) and intended to form the working areas at a later stage, (c) a layer of insulating material (8) is deposited in the trenches (7) and on the predetermined areas (6) of the substrate (1), and (d) the semiconductor block is planarised in a single step by chemical-mechanical polishing in such a way that the polysilicon of the upper layer (3b) has a higher etching rate during chemical-mechanical polishing than the insulating material, while the nitride of the lower layer (3a) has good resistance to chemical-mechanical etching. In one embodiment, the chemical-mechanical polishing of step (d) is combined with end-of-etching detection on the two-component protective layer (3).
    • 一种使用侧沟槽隔离半导体衬底的工作区域的方法,其中(a)由氮化硅和多晶硅构成的双组分保护层(3)沉积在半导体衬底上,(b)沟槽(7) 在半导体衬底(1)中沿着衬底(1)的预定区域(6),被覆盖有保护层(3)并且旨在在稍后阶段形成工作区域,(c)绝缘材料层 8)沉积在沟槽(7)和衬底(1)的预定区域(6)上,和(d)半导体块通过化学机械抛光在单个步骤中平面化,使得多晶硅 (3b)的化学机械抛光时的蚀刻速率比绝缘材料高,而下层(3a)的氮化物具有良好的抗化学机械蚀刻性。 在一个实施例中,将步骤(d)的化学机械抛光与双组分保护层(3)上的蚀刻终止检测相结合。