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1. 发明申请

WO2009156354A1 FABRICATION OF COMPACT OPTO-ELECTRONIC COMPONENT PACKAGES 审中-公开
标题翻译： COMPACT OPTO-ELECTRONIC COMPONENT PACKAGE的制造
公开(公告)号：WO2009156354A1
公开(公告)日：2009-12-30
申请号：PCT/EP2009/057711
申请日：2009-06-22
申请人： HYMITE A/S , KUHMANN, Jochen
发明人： KUHMANN, Jochen
IPC分类号： H01L33/00
CPC分类号： H01L33/62 , H01L21/76898 , H01L23/481 , H01L24/48 , H01L33/486 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/01019 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H01L2933/0016 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A wafer-level method of fabricating an opto-electronic component package, in which the opto-electronic component is mounted to a semiconductor wafer (175) having first and second surfaces (118, 119) on opposite sides of the wafer. The method includes etching vias (122) in the first surface (118) of the semiconductor wafer. The first surface and surfaces in the vias are metallized, and the metal is structured to define a thermal pad (124) and to define the anode and cathode contact pads (126). A carrier wafer (130) is attached on the side of the semiconductor wafer having the first surface (118), and the semiconductor wafer is thinned from its second surface (119) to expose the metallization in the vias. Metal is provided on the second surface, and the metal is structured to define a die attach pad (HOa) and additional anode and cathode pads (HOb) for the opto-electronic component (108). The opto-electronic component is mounted on the die attach pad and a protective cover is formed over the opto-electronic component.
摘要翻译：一种制造光电子部件封装的晶片级方法，其中所述光电子部件安装到在所述晶片的相对侧上具有第一和第二表面（118,119）的半导体晶片（175）。该方法包括在半导体晶片的第一表面（118）中蚀刻通孔（122）。通孔中的第一表面和表面被金属化，并且金属构造成限定热垫（124）并限定阳极和阴极接触垫（126）。载体晶片（130）附接在具有第一表面（118）的半导体晶片的侧面上，并且半导体晶片从其第二表面（119）变薄以暴露通孔中的金属化。金属被设置在第二表面上，并且金属被构造成限定用于光电子部件（108）的管芯附接焊盘（110a）和附加的阳极和阴极焊盘（110a）。光电元件安装在芯片安装板上，并在光电元件上形成保护盖。

2. 发明申请

WO2010092042A3 SILICON-BASED SUB-MOUNT FOR AN OPTO-ELECTRONIC DEVICE 审中-公开
标题翻译：用于光电设备的基于硅的子装置
公开(公告)号：WO2010092042A3
公开(公告)日：2010-10-07
申请号：PCT/EP2010051562
申请日：2010-02-09
申请人： HYMITE AS , KUHMANN JOCHEN , HUSCHER HEIKE
发明人： KUHMANN JOCHEN , HUSCHER HEIKE
IPC分类号： H01L23/498 , H01L33/62 , H01R12/51
CPC分类号： H01L23/13 , H01L23/147 , H01L23/49827 , H01L33/486 , H01L33/62 , H01L2224/48091 , H01L2924/10253 , H01L2924/00012 , H01L2924/00
摘要： A package for an optoelectronic device (e.g., a light emitting device such as a LED) includes a sub-mount including a silicon substrate having a thickness in the range of 350 µm - 700 µm. The optoelectronic device is mounted on a die attach pad on the front-side surface of the substrate. Feed-through metallization in one or more via structures having inclined walls such that the cross section of the via structures becomes narrower in a direction into the substrate from both the front-side and back-side surfaces, electrically couples the die attach pad to a contact pad on the back-side surface of the substrate.
摘要翻译：用于光电器件（例如，诸如LED的发光器件）的封装包括具有厚度在350μm至700μm范围内的硅衬底的子座。光电子器件安装在衬底的正面上的管芯附着焊盘上。在具有倾斜壁的一个或多个通孔结构中的直通金属化使得通孔结构的横截面在从前侧和后侧表面进入衬底的方向上变窄，将管芯附接垫电连接到接触垫在基板的背面表面上。

3. 发明申请

WO2007017757A3 CHIP SCALE PACKAGE FOR A MICRO COMPONENT 审中-公开
标题翻译：用于微型组件的芯片尺寸封装
公开(公告)号：WO2007017757A3
公开(公告)日：2007-04-19
申请号：PCT/IB2006002555
申请日：2006-08-10
申请人： HYMITE AS , KUHMANN JOCHEN , HESCHEL MATTHIAS
发明人： KUHMANN JOCHEN , HESCHEL MATTHIAS
IPC分类号： B81C1/00
CPC分类号： B81C1/0023 , H01L2224/32245 , H01L2224/48095 , H01L2224/48247 , H01L2224/73265 , H01L2924/10253 , H01L2924/1461 , H01L2924/181 , H01L2924/00 , H01L2924/00012
摘要： A package includes a sensor die with a micro component, such as a MEMS device, coupled to an integrated circuit which may include, for example., CMOS circuitry, and one or more electrically conductive bond pads near the periphery of the sensor die. A semiconductor cap structure is attached to the sensor die. The front side of the cap structure is attached to the sensor die by a seal ring to hermetically encapsulate an area of the sensor die where the micro component is located. The bond pads on the sensor die are located outside the area encapsulated by the seal ring. Electrical leads, which extend along outer side edges of the semiconductor cap structure from its front side to its back side, are coupled to the micro component via the bond pads.
摘要翻译：封装包括具有诸如MEMS器件之类的微型部件的传感器裸片，其耦合到集成电路，该集成电路可以包括例如CMOS电路以及靠近传感器裸片外围的一个或多个导电接合焊盘。半导体帽结构被附接到传感器管芯。盖结构的前侧通过密封环附接到传感器芯片上以气密地封装微型部件所在的传感器芯片的区域。传感器芯片上的接合焊盘位于由密封环封装的区域之外。从半导体顶盖结构的正面到背面沿着半导体顶盖结构的外侧边缘延伸的电引线经由接合垫耦合到微型部件。

4. 发明申请

WO0119134A3 SILICON-BASED SENSOR SYSTEM 审中-公开
标题翻译：硅基传感器系统
公开(公告)号：WO0119134A3
公开(公告)日：2001-09-07
申请号：PCT/DK0000491
申请日：2000-09-06
申请人： MICROTRONIC AS , MUELLENBORN MATTHIAS , KUHMANN JOCHEN F , SCHEEL PETER U
发明人： MUELLENBORN MATTHIAS , KUHMANN JOCHEN F , SCHEEL PETER U
IPC分类号： H04R19/00 , H04R19/04 , H04R25/00
CPC分类号： H04R19/005 , H04R19/04 , H04R25/60
摘要： The present invention relates to solid state silicon-based condenser microphone systems suitable for batch production. The combination of the different elements forming the microphone system is more flexible compared to any other system disclosed in the prior art. Electrical connections between the different elements of the microphone system are established economically and reliably via a silicon carrier using flip-chip technology. The invention uses an integrated electronic circuit chip, preferably an application specific integrated circuit (ASIC) which may be designed and manufactured separately and independent of the design and manufacture of the transducer element of the microphone. The complete sensor system can be electrically connected to an external substrate by surface mount technology with the contacts facing one side of the system that is not in conflict with the above-mentioned interface to the environment. This allows the user to apply simple and efficient surface mount techniques for the assembly of the overall system.
摘要翻译：本发明涉及适合批量生产的固态硅基电容麦克风系统。与现有技术中公开的任何其他系统相比，形成麦克风系统的不同元件的组合更加灵活。麦克风系统的不同元件之间的电气连接通过使用倒装芯片技术的硅载体经济可靠地建立。本发明使用集成电子电路芯片，优选地是专用集成电路（ASIC），其可以分开设计和制造，而与麦克风的换能器元件的设计和制造无关。完整的传感器系统可以通过表面贴装技术与外部基板电连接，触点面向系统的一侧，不与上述与环境的界面相冲突。这允许用户为组装整个系统应用简单而有效的表面贴装技术。

5. 发明申请

WO0106285A3 HYBRID INTEGRATION OF ACTIVE AND PASSIVE OPTICAL COMPONENTS ON AN SI-BOARD 审中-公开
标题翻译：主动和被动光学元件在SI板上的混合集成
公开(公告)号：WO0106285A3
公开(公告)日：2001-08-30
申请号：PCT/DK0000407
申请日：2000-07-17
申请人： HYBRID MICRO TECHNOLOGIES APS , KUHMANN JOCHEN F , POULSEN MOGENS RYSHOLT
发明人： KUHMANN JOCHEN F , POULSEN MOGENS RYSHOLT
IPC分类号： G02B6/12 , G02B6/13 , G02B6/36 , G02B6/42
CPC分类号： G02B6/12004 , G02B6/42 , G02B6/423 , G02B6/4232 , G02B6/4238 , G02B6/4248 , G02B2006/12176 , G02B2006/12195
摘要： The present invention relates to an assembly structure and a method for assembling active and passive photonic and/or optoelectronic devices on a silicon board. The invention relates in particular to an assembly structure and a method for aligning the photonic devices during the assembling procedure. According to the present invention, the assembly structure comprises one or more alignment features comprising tapered side surface parts in directions at least substantially parallel to an optical axis. By providing a tapering in a direction at least substantially parallel to the first optical axis, any inaccuracies primarily affects the non-critical positioning in the direction along the optical axis, whereas the critical positioning transverse to the optical axis merely depends on the symmetry of alignment features. The errors from the inherent inaccuracy of the position and shape of alignment features are thereby minimised. Also, the devices to be aligned are preferably arranged on top of the alignment features which forms part of the basic structure on the silicon board. All alignment features can thereby be defined in a single mask step together with the structures with which the alignment is to be carried out, resulting in an improved accuracy of the assembly structure. The resulting components will be used especially for broadband telecommunication components.
摘要翻译：本发明涉及在硅板上组装有源和无源光子和/或光电器件的装配结构和方法。本发明特别涉及组装结构和在组装过程中对准光子器件的方法。根据本发明，组装结构包括一个或多个对准特征，其包括在至少基本平行于光轴的方向上的锥形侧表面部分。通过在至少基本上平行于第一光轴的方向上提供渐缩，任何不准确性主要影响沿着光轴的方向上的非临界定位，而横向于光轴的临界定位仅取决于对准的对称性特征。由此，对准特征的位置和形状的固有的不准确性的误差因而被最小化。此外，待对准的装置优选地布置在形成硅板上的基本结构的一部分的对准特征的顶部上。因此，所有对准特征可以与单个掩模步骤一起被限定在与要执行对准的结构一起，从而提高组装结构的精度。所得到的组件将特别用于宽带电信组件。

6. 发明申请

WO2010092042A2 SILICON-BASED SUB-MOUNT FOR AN OPTO-ELECTRONIC DEVICE 审中-公开
标题翻译：用于光电设备的基于硅的子装置
公开(公告)号：WO2010092042A2
公开(公告)日：2010-08-19
申请号：PCT/EP2010/051562
申请日：2010-02-09
申请人： HYMITE A/S , KUHMANN, Jochen , HUSCHER, Heike
发明人： KUHMANN, Jochen , HUSCHER, Heike
IPC分类号： H01L23/498
CPC分类号： H01L23/13 , H01L23/147 , H01L23/49827 , H01L33/486 , H01L33/62 , H01L2224/48091 , H01L2924/10253 , H01L2924/00012 , H01L2924/00
摘要： A package for an optoelectronic device (e.g., a light emitting device such as a LED) includes a sub-mount including a silicon substrate having a thickness in the range of 350 μm - 700 μm. The optoelectronic device is mounted on a die attach pad on the front-side surface of the substrate. Feed-through metallization in one or more via structures electrically couples the die attach pad to a contact pad on the back-side surface of the substrate.
摘要翻译：用于光电器件（例如，诸如LED的发光器件）的封装包括具有厚度在350μm至700μm范围内的硅衬底的子座。光电子器件安装在衬底的正面上的管芯附着焊盘上。一个或多个通孔结构中的直通金属化将管芯附着垫电耦合到衬底的背面表面上的接触焊盘。

7. 发明申请

WO2009089996A1 FABRICATION OF COMPACT SEMICONDUCTOR PACKAGES 审中-公开
标题翻译：紧凑型半导体封装的制造
公开(公告)号：WO2009089996A1
公开(公告)日：2009-07-23
申请号：PCT/EP2008/068346
申请日：2008-12-30
申请人： HYMITE A/S , KUHMANN, Jochen , HASE, Andreas A.
发明人： KUHMANN, Jochen , HASE, Andreas A.
IPC分类号： H01L23/04
CPC分类号： H01L23/04 , B81B2207/096 , B81C1/00301 , H01L2924/0002 , H01L2924/01079 , H01L2924/00
摘要： A wafer-level method of fabricating a chip-to-wafer or wafer-to -wafer semiconductor packages includes etching a cavity 104 into a first semiconductor wafer 118, 102 and etching vias in a bottom of the cavity. The cavity and sidewalls of the vias are selectively metallized. The cavity can be used to house either an electrical circuit component 113 or to contain a device die. A second semiconductor wafer 106 is placed over the cavity-side of the first semiconductor 102 and is sealed to the first semiconductor wafer. A backside 115 of the first semiconductor wafer is thinned to expose metallization 112 in the vias and metal is deposited on the backside to form circuit routing paths 122.
摘要翻译：制造芯片到晶片或晶片到等离子体半导体封装的晶片级方法包括将空腔104蚀刻成第一半导体晶片118,102并蚀刻腔的底部中的通孔。通孔的腔和侧壁被选择性地金属化。空腔可用于容纳电路元件113或容纳器件裸片。第二半导体晶片106被放置在第一半导体102的空腔侧之上并被密封到第一半导体晶片。第一半导体晶片的背面115变薄以暴露通孔中的金属化层112，金属沉积在背面以形成电路布线路径122。

8. 发明申请

WO2007054819A2 SEALED PACKAGE WITH GLASS WINDOW FOR OPTOELECTRONIC COMPONENTS AND ASSEMBLIES INCORPORATING THE SAME 审中-公开
标题翻译：用于光电组件的玻璃窗密封包装及其组合
公开(公告)号：WO2007054819A2
公开(公告)日：2007-05-18
申请号：PCT/IB2006/003651
申请日：2006-11-10
申请人： HYMITE A/S , SHIV, Lior , KUHMANN, Jochen
发明人： SHIV, Lior , KUHMANN, Jochen
IPC分类号： H01L33/48
CPC分类号： H01L27/14618 , H01L27/14621 , H01L27/14625 , H01L27/14627 , H01L27/14683 , H01L27/14685 , H01L31/0203 , H01L31/02325 , H01L33/44 , H01L33/483 , H01L2924/16235
摘要： A package includes one or more optoelectronic components and a cap with an embedded glass window attached to a substrate. The optoelectronic comρonent(s) is supported by the substrate and is capable of detecting or emitting light through the glass window. The glass window may serve as an optical filter. Techniques are disclosed for fabricating a relatively thin package with an embedded glass window in the cap.
摘要翻译：包装包括一个或多个光电子部件和具有附接到基板的嵌入式玻璃窗的盖。光电子器件由衬底支撑，并且能够通过玻璃窗检测或发射光。玻璃窗可用作滤光器。公开了用于制造具有在盖中的嵌入式玻璃窗的相对薄的包装的技术。

9. 发明申请

WO2007054819A3 SEALED PACKAGE WITH GLASS WINDOW FOR OPTOELECTRONIC COMPONENTS AND ASSEMBLIES INCORPORATING THE SAME 审中-公开
标题翻译：用于光电组件的玻璃窗密封包装及其组合
公开(公告)号：WO2007054819A3
公开(公告)日：2008-01-03
申请号：PCT/IB2006003651
申请日：2006-11-10
申请人： HYMITE AS , SHIV LIOR , KUHMANN JOCHEN
发明人： SHIV LIOR , KUHMANN JOCHEN
IPC分类号： H01L27/146 , H01L31/0203 , H01L31/0232 , H01L33/48
CPC分类号： H01L27/14618 , H01L27/14621 , H01L27/14625 , H01L27/14627 , H01L27/14683 , H01L27/14685 , H01L31/0203 , H01L31/02325 , H01L33/44 , H01L33/483 , H01L2924/16235
摘要： A package includes one or more optoelectronic components and a cap with an embedded glass window attached to a substrate. The optoelectronic com?onent(s) is supported by the substrate and is capable of detecting or emitting light through the glass window. The glass window may serve as an optical filter. Techniques are disclosed for fabricating a relatively thin package with an embedded glass window in the cap.
摘要翻译：包装包括一个或多个光电子部件和具有附接到基板的嵌入式玻璃窗的盖。光电子器件由衬底支撑，并且能够通过玻璃窗检测或发射光。玻璃窗可用作滤光器。公开了用于制造具有在盖中的嵌入式玻璃窗的相对薄的包装的技术。

10. 发明申请

WO2007017757A2 CHIP SCALE PACKAGE FOR A MICRO COMPONENT 审中-公开
标题翻译：用于微型组件的芯片尺寸包装
公开(公告)号：WO2007017757A2
公开(公告)日：2007-02-15
申请号：PCT/IB2006/002555
申请日：2006-08-10
申请人： HYMITE A/S , KUHMANN, Jochen , HESCHEL, Matthias
发明人： KUHMANN, Jochen , HESCHEL, Matthias
IPC分类号： B81C1/00
CPC分类号： B81C1/0023 , H01L2224/32245 , H01L2224/48095 , H01L2224/48247 , H01L2224/73265 , H01L2924/10253 , H01L2924/1461 , H01L2924/181 , H01L2924/00 , H01L2924/00012
摘要： A package includes a sensor die with a micro component, such as a MEMS device, coupled to an integrated circuit which may include, for example., CMOS circuitry, and one or more electrically conductive bond pads near the periphery of the sensor die. A semiconductor cap structure is attached to the sensor die. The front side of the cap structure is attached to the sensor die by a seal ring to hermetically encapsulate an area of the sensor die where the micro component is located. The bond pads on the sensor die are located outside the area encapsulated by the seal ring. Electrical leads, which extend along outer side edges of the semiconductor cap structure from its front side to its back side, are coupled to the micro component via the bond pads.
摘要翻译：封装包括具有耦合到集成电路的诸如MEMS器件的微元件的传感器管芯，该集成电路可以包括例如CMOS电路，以及在传感器管芯的周围附近的一个或多个导电接合焊盘。半导体盖结构附接到传感器管芯。盖结构的前侧通过密封环附接到传感器管芯，以密封地封装微组件所在的传感器管芯的区域。传感器芯片上的接合焊盘位于由密封环封装的区域之外。沿着半导体盖结构的外侧边缘从其前侧延伸到其后侧的电引线通过接合焊盘耦合到微型部件。

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