专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2009154355A4 DISPLAY DRIVE CIRCUIT AND DRIVE METHOD 审中-公开
标题翻译：显示驱动电路和驱动方法
公开(公告)号：WO2009154355A4
公开(公告)日：2010-05-14
申请号：PCT/KR2009002693
申请日：2009-05-22
申请人： SILICON WORKS CO LTD , CHO HYUN HO , CHO HYUN JA , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
发明人： CHO HYUN HO , CHO HYUN JA , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
IPC分类号： G09G3/36
CPC分类号： G09G3/3685 , G09G3/20 , G09G3/3688 , G09G2310/0275 , G09G2310/061 , G09G2320/0257 , G09G2330/021
摘要： The present invention concerns a display drive circuit and drive method for not only minimising afterimages on display panels but also minimising electrical current consumption. The display drive circuit comprises: N data-selection switches (where N is an integer) for generating drive signals corresponding to valid data and black data, and transmitting the signals to a display panel; N buffers; N buffer output selection switches; and a plurality of charge-distribution switches. The N data-selection switches select one or other of the valid data and black data. The N buffers respectively buffer the signals selected by the data-selection switches. The N buffer output selection switches respectively switch the buffer outputs, and output the drive signals. The plurality of charge-distribution switches connect two neighbouring drive signals with each other.
摘要翻译：本发明涉及一种显示驱动电路和驱动方法，其不仅使显示面板上的余像最小化，而且还使电流消耗最小化。该显示驱动电路包括：N个数据选择开关（其中N是整数），用于产生对应于有效数据和黑色数据的驱动信号，并将这些信号传输到显示面板; N个缓冲区; N个缓冲输出选择开关; 和多个电荷分配开关。 N个数据选择开关选择有效数据和黑色数据中的一个或另一个。 N个缓冲器分别缓冲由数据选择开关选择的信号。 N个缓冲输出选择开关分别切换缓冲输出，并输出驱动信号。多个电荷分配开关将两个相邻驱动信号彼此连接。

2. 发明申请

WO2009154355A3 DISPLAY DRIVE CIRCUIT AND DRIVE METHOD 审中-公开
标题翻译：显示驱动电路和驱动方法
公开(公告)号：WO2009154355A3
公开(公告)日：2010-03-25
申请号：PCT/KR2009002693
申请日：2009-05-22
申请人： SILICON WORKS CO LTD , CHO HYUN HO , CHO HYUN JA , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
发明人： CHO HYUN HO , CHO HYUN JA , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
IPC分类号： G09G3/36
CPC分类号： G09G3/3685 , G09G3/20 , G09G3/3688 , G09G2310/0275 , G09G2310/061 , G09G2320/0257 , G09G2330/021
摘要： The present invention concerns a display drive circuit and drive method for not only minimising afterimages on display panels but also minimising electrical current consumption. The display drive circuit comprises: N data-selection switches (where N is an integer) for generating drive signals corresponding to valid data and black data, and transmitting the signals to a display panel; N buffers; N buffer output selection switches; and a plurality of charge-distribution switches. The N data-selection switches select one or other of the valid data and black data. The N buffers respectively buffer the signals selected by the data-selection switches. The N buffer output selection switches respectively switch the buffer outputs, and output the drive signals. The plurality of charge-distribution switches connect two neighbouring drive signals with each other.
摘要翻译：本发明涉及一种显示驱动电路和驱动方法，用于不仅使显示面板上的残影最小化，而且最小化电流消耗。显示驱动电路包括：用于产生对应于有效数据和黑数据的驱动信号的N个数据选择开关（其中N是整数），并将该信号发送到显示面板; N个缓冲区 N个缓冲输出选择开关; 和多个电荷分配开关。 N个数据选择开关选择一个或多个有效数据和黑色数据。 N个缓冲器分别缓冲由数据选择开关选择的信号。 N个缓冲器输出选择开关分别切换缓冲器输出，并输出驱动信号。多个电荷分配开关将两个相邻的驱动信号彼此连接。

3. 发明申请

WO2009154354A3 PAD LAYOUT STRUCTURE OF A DRIVER IC CHIP 审中-公开
标题翻译：驱动IC芯片的PAD布局结构
公开(公告)号：WO2009154354A3
公开(公告)日：2010-02-11
申请号：PCT/KR2009002692
申请日：2009-05-22
申请人： SILICON WORKS CO LTD , CHOI JOUNG CHEUL , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
发明人： CHOI JOUNG CHEUL , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
IPC分类号： G02F1/1345
CPC分类号： G02F1/1345 , H01L23/49838 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to a pad layout structure for a driver IC chip in an LCD device, more particularly to a pad layout structure of a driver IC chip having an improved adhesive performance between the driver IC chip and an LCD panel, which is achieved by laying out all power supply pads within the driver IC chip in the four directions at the edges of the chip during adhesion of the chip to the LCD panel by the Chip-On-Glass (COG) method. With the pad layout structure according to the present invention, adhesive performance between the driver IC chip and the LCD panel can be improved advantageously even if a force applied to the driver IC chip during adhesion of the chip to the panel is not even, since power supply pads within the driver IC chip are laid out on four directions at the edges of the chip.
摘要翻译：本发明涉及一种用于LCD装置中的驱动器IC芯片的焊盘布局结构，更具体地说，涉及一种具有改进的驱动IC芯片与LCD面板之间的粘合性能的驱动IC芯片的焊盘布局结构，其通过通过晶片玻璃（COG）方法将芯片粘附到LCD面板时，在芯片边缘的四个方向上布置驱动器IC芯片内的所有电源焊盘。利用根据本发明的焊盘布局结构，即使在将芯片粘附到面板时施加到驱动器IC芯片的力不均匀也可以有利地改善驱动器IC芯片和LCD面板之间的粘合性能，因为功率驱动器IC芯片内的供电焊盘布置在芯片边缘的四个方向上。

4. 发明申请

WO2009125976A3 INTEGRATED RF CARD READER 审中-公开
公开(公告)号：WO2009125976A3
公开(公告)日：2009-10-15
申请号：PCT/KR2009/001810
申请日：2009-04-08
申请人： SAMSUNG S.D.S CO., LTD. , KIM, Dae Seong , JEONG, Byeong Cheon , PARK, Hyun Soo , KIM, Kyung Hoon , MAING, Min Gyu , LEE, Dong Won
发明人： KIM, Dae Seong , JEONG, Byeong Cheon , PARK, Hyun Soo , KIM, Kyung Hoon , MAING, Min Gyu , LEE, Dong Won
IPC分类号： G06K17/00
摘要： An integrated RF card reader includes an integrated RF transmission unit including a Felica chip and a Felica security unit performing a security function that is needed to process a Felica type RF card where an RF function is removed. Since a variety of types can be embodied through a single RF transmission circuit by using the integrated RF card reader, a manufacturing cost can be reduced.

5. 发明申请

WO2009066882A2 OFFSET COMPENSATION GAMMA BUFFER AND GRAY SCALE VOLTAGE GENERATION CIRCUIT USING THE SAME 审中-公开
标题翻译：偏移补偿伽马缓冲器和灰度级电压发生电路
公开(公告)号：WO2009066882A2
公开(公告)日：2009-05-28
申请号：PCT/KR2008/006418
申请日：2008-10-30
申请人： SILICON WORKS CO., LTD , HAN, Dae Keun , KIM, Dae Seong , NA, Joon Ho , KIM, An Young , KO, Man Jeong
发明人： HAN, Dae Keun , KIM, Dae Seong , NA, Joon Ho , KIM, An Young , KO, Man Jeong
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G2310/027
摘要： Disclosed are an offset compensation gamma buffer and a gray scale voltage generation circuit using the same. The offset compensation gamma buffer includes: a buffer which outputs an input voltage input to a positive or negative input terminal as an output voltage; and a switching unit which selectively connects the input voltage and the output voltage of the buffer to the positive and negative input terminals in response to a control signal. The output voltageof the offset compensation gamma buffer is supplied to the input of a gray scale voltage generation circuit of a source driver for driving a liquid crystal panel. The offset of the offset compensation gamma buffer is compensated using an inversion timing of the control signal. The output voltage of the offset compensation gamma buffer is supplied as a reference voltage of the voltage divider unit for generating the gray scale voltages, and the offset of the gray scale voltages is also compensated.
摘要翻译：公开了一种偏移补偿伽马缓冲器和使用其的灰度级电压产生电路。偏移补偿伽马缓冲器包括：输出输入到正或负输入端的输入电压作为输出电压的缓冲器; 以及切换单元，其响应于控制信号选择性地将缓冲器的输入电压和输出电压连接到正负输入端子。偏移补偿伽马缓冲器的输出电压被提供给用于驱动液晶面板的源极驱动器的灰度级电压产生电路的输入端。使用控制信号的反转定时来补偿偏移补偿伽马缓冲器的偏移。偏移补偿伽马缓冲器的输出电压作为分压器单元的基准电压被提供，用于产生灰度级电压，并且补偿灰度级电压的偏移。

6. 发明申请

WO2010093123A3 SOURCE DRIVER INTEGRATED CIRCUIT IN WHICH THE HIGH-VOLTAGE POWER GROUND AND THE LOW-VOLTAGE POWER GROUND ARE SEPARATED 审中-公开
公开(公告)号：WO2010093123A3
公开(公告)日：2010-10-28
申请号：PCT/KR2010000224
申请日：2010-01-14
申请人： SILICON WORKS CO LTD , HONG JU PYO , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG
发明人： HONG JU PYO , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
CPC分类号： G09G3/3685 , G09G2330/06
摘要： The present invention relates to a technique for separating the grounds of a source driver integrated circuit in a liquid crystal display device, and more particularly, to a source driver integrated circuit in which the high-voltage power ground and the low-voltage power ground are separated from each other in a liquid crystal display device having a chip-on-glass (COG) cascade structure.

7. 发明申请

WO2010047474A4 SOURCE DRIVER INTEGRATED CIRCUIT THAT ENABLES MULTIPAIRED DATA INTERFACE, AND DISPLAY PANEL DRIVING SYSTEM INCLUDING THE SOURCE DRIVER INTEGRATED CIRCUIT 审中-公开
标题翻译：使用多种数据接口的源驱动器集成电路和包括源驱动器集成电路的显示面板驱动系统
公开(公告)号：WO2010047474A4
公开(公告)日：2010-09-23
申请号：PCT/KR2009005364
申请日：2009-09-21
申请人： SILICON WORKS CO LTD , SEO JUNG IL , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG
发明人： SEO JUNG IL , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG
IPC分类号： G09G3/20
CPC分类号： G09G3/2092
摘要： The present invention introduces a display panel driving system and source driver ICs (Integrated Circuits) to drive a display panel regardless of the amount of paired differential image data outputted from a timing control circuit. The display panel driving system according to the invention comprises a driver block that includes: the timing control circuit that outputs M paired data (M is an integer) and N paired data (N is an integer smaller than M), and the plural source driver ICs that receive the M or N paired data to drive a display panel. The source driver ICs receive the M or N paired serial data and output the parallel data of M×K bits (K is an integer). In addition, the source driver ICs comprise: multipaired serial-parallel converters that receive the M or N paired serial data and convert the received serial data into parallel data, and a data arrangement circuit that arranges and outputs the parallel data of M×K bits.
摘要翻译：本发明不考虑从定时控制电路输出的成对差分图像数据的数量，引入显示面板驱动系统和源极驱动器IC（集成电路）来驱动显示面板。根据本发明的显示面板驱动系统包括驱动器块，其包括：输出M个成对数据（M为整数）和N个配对数据（N为小于M的整数）的定时控制电路，以及多个源驱动器接收M或N配对数据以驱动显示面板的IC。源极驱动器IC接收M或N配对的串行数据，并输出M×K位的并行数据（K为整数）。此外，源极驱动器IC包括：接收M或N个成对串行数据并将接收到的串行数据转换为并行数据的多个串并转换器，以及数据排列电路，其布置并输出M×K位的并行数据。

8. 发明申请

WO2010047474A2 SOURCE DRIVER INTEGRATED CIRCUIT THAT ENABLES MULTIPAIRED DATA INTERFACE, AND DISPLAY PANEL DRIVING SYSTEM INCLUDING THE SOURCE DRIVER INTEGRATED CIRCUIT 审中-公开
标题翻译：源驱动器集成电路，可启用多路数据接口，并显示面板驱动系统，包括源驱动器集成电路
公开(公告)号：WO2010047474A2
公开(公告)日：2010-04-29
申请号：PCT/KR2009005364
申请日：2009-09-21
申请人： SILICON WORKS CO LTD , SEO JUNG IL , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG
发明人： SEO JUNG IL , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG
IPC分类号： G09G3/20
CPC分类号： G09G3/2092
摘要： The present invention introduces a display panel driving system and source driver ICs (Integrated Circuits) to drive a display panel regardless of the amount of paired differential image data outputted from a timing control circuit. The display panel driving system according to the invention comprises a driver block that includes: the timing control circuit that outputs M paired data (M is an integer) and N paired data (N is an integer smaller than M), and the plural source driver ICs that receive the M or N paired data to drive a display panel. The source driver ICs receive the M or N paired serial data and output the parallel data of M×K bits (K is an integer). In addition, the source driver ICs comprise: multipaired serial-parallel converters that receive the M or N paired serial data and convert the received serial data into parallel data, and a data arrangement circuit that arranges and outputs the parallel data of M×K bits.
摘要翻译：本发明引入了显示面板驱动系统和源驱动器IC（集成电路），以驱动显示面板，而不管从定时控制电路输出的成对差分图像数据的量。根据本发明的显示面板驱动系统包括驱动器块，该驱动器块包括：输出M个配对数据（M是整数）和N个配对数据（N是小于M的整数）的时序控制电路，以及多个源极驱动器接收M或N配对数据驱动显示面板的IC。源驱动器IC接收M或N配对串行数据并输出M×K位（K是整数）的并行数据。另外，源极驱动器IC包括：多对串并转换器，其接收M或N个配对串行数据并将接收到的串行数据转换成并行数据;以及数据配置电路，其排列并输出M×K位的并行数据。

9. 发明申请

WO2009142399A3 COG PANEL SYSTEM ARRANGEMENT 审中-公开
标题翻译： COG面板系统布置
公开(公告)号：WO2009142399A3
公开(公告)日：2010-02-11
申请号：PCT/KR2009002234
申请日：2009-04-29
申请人： SILICON WORKS CO LTD , KIM KYUNG CHUN , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG
发明人： KIM KYUNG CHUN , KIM AN YOUNG , NA JOON HO , KIM DAE SEONG
IPC分类号： G09G3/36
CPC分类号： G09G3/3696 , G09G3/3685 , G09G2320/0233 , G09G2330/02
摘要： Disclosed is a COG panel system arrangement for minimizing block dim taking into account the correlations between a plurality of chips. The COG panel system arrangement comprises: an FPC for supplying at least two electric power supplies of predetermined voltage level, at least one block dim compensation resistor and a plurality of SDICs for dividing and generating a plurality of continuous LCD drive signals required for an artibrary line of an LCD, jointly supplied with a bypass electric supply which is supplied from the FPC.
摘要翻译：公开了一种COG面板系统装置，用于考虑到多个芯片之间的相关性来最小化块模糊。 COG面板系统装置包括：用于提供预定电压电平的至少两个电源的FPC，至少一个块调光补偿电阻器和用于分割和产生多个连续的LCD驱动信号的多个SDIC，用于工作线共同供给由FPC供给的旁路电源。

10. 发明申请

WO2009066882A3 OFFSET COMPENSATION GAMMA BUFFER AND GRAY SCALE VOLTAGE GENERATION CIRCUIT USING THE SAME 审中-公开
标题翻译：失调补偿伽马缓冲器和使用相同灰度的电压发生电路
公开(公告)号：WO2009066882A3
公开(公告)日：2009-07-16
申请号：PCT/KR2008006418
申请日：2008-10-30
申请人： SILICON WORKS CO LTD , HAN DAE KEUN , KIM DAE SEONG , NA JOON HO , KIM AN YOUNG , KO MAN JEONG
发明人： HAN DAE KEUN , KIM DAE SEONG , NA JOON HO , KIM AN YOUNG , KO MAN JEONG
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G2310/027
摘要： Disclosed are an offset compensation gamma buffer and a gray scale voltage generation circuit using the same. The offset compensation gamma buffer includes: a buffer which outputs an input voltage input to a positive or negative input terminal as an output voltage; and a switching unit which selectively connects the input voltage and the output voltage of the buffer to the positive and negative input terminals in response to a control signal. The output voltageof the offset compensation gamma buffer is supplied to the input of a gray scale voltage generation circuit of a source driver for driving a liquid crystal panel. The offset of the offset compensation gamma buffer is compensated using an inversion timing of the control signal. The output voltage of the offset compensation gamma buffer is supplied as a reference voltage of the voltage divider unit for generating the gray scale voltages, and the offset of the gray scale voltages is also compensated.
摘要翻译：公开了一种偏移补偿伽玛缓冲器和使用该缓冲器的灰度级电压生成电路。偏移补偿伽马缓冲器包括：缓冲器，其将输入到正或负输入端子的输入电压输出为输出电压; 以及切换单元，其响应于控制信号而将所述缓冲器的所述输入电压和所述输出电压选择性地连接到所述正输入端子和所述负输入端子。偏移补偿伽玛缓冲器的输出电压被提供给用于驱动液晶面板的源极驱动器的灰度级电压产生电路的输入。使用控制信号的反转定时来补偿偏移补偿伽马缓冲器的偏移。偏移补偿伽玛缓冲器的输出电压作为用于产生灰度级电压的分压器单元的参考电压被提供，并且灰度级电压的偏移也被补偿。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式