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1. 发明申请

WO2014149624A1 LINEAR ADDRESS MAPPING PROTECTION 审中-公开
标题翻译：线性地图映射保护
公开(公告)号：WO2014149624A1
公开(公告)日：2014-09-25
申请号：PCT/US2014/019947
申请日：2014-03-03
申请人： INTEL CORPORATION , BACHWANI, Rekha N. , SAHITA, Ravi L. , DURHAM, David M.
发明人： BACHWANI, Rekha N. , SAHITA, Ravi L. , DURHAM, David M.
IPC分类号： G06F21/70 , G06F21/78 , G06F21/56
CPC分类号： G06F21/56 , G06F9/45558 , G06F21/554 , G06F21/563 , G06F21/566 , G06F2009/45583 , G06F2009/45587
摘要： Technologies for securing an electronic device include determining addresses of one or more memory pages, injecting for each memory page a portion of identifier data into the memory page, storing an indication of the identifier data injected into each of the memory pages, determining an attempt to access at least one of the memory pages, determining any of the identifier data present on a memory page associated with the attempt, comparing the indication of the identifier data with the determined identifier data present on the memory page, and, based on the comparison, determining whether to allow the access.
摘要翻译：用于确保电子设备的技术包括确定一个或多个存储器页面的地址，将每个存储器页面的一部分标识符数据注入存储器页面，存储注入到每个存储器页面中的标识符数据的指示，访问存储器页面中的至少一个，确定存在于与尝试相关联的存储器页面上的任何标识符数据，将标识符数据的指示与存储在页面上的确定的标识符数据进行比较，并且基于该比较，确定是否允许访问。

2. 发明申请

WO2013147908A1 METHODS AND SYSTEMS FOR CRYPTOGRAPHIC ACCESS CONTROL OF VIDEO 审中-公开
标题翻译：视频录像访问控制的方法与系统
公开(公告)号：WO2013147908A1
公开(公告)日：2013-10-03
申请号：PCT/US2012/031753
申请日：2012-03-31
申请人： INTEL CORPORATION , GREWAL, Karanvir S. , DURHAM, David M. , DEWAN, Prashant , KANG, Xiaozhu , LONG, Men
发明人： GREWAL, Karanvir S. , DURHAM, David M. , DEWAN, Prashant , KANG, Xiaozhu , LONG, Men
IPC分类号： H04N21/266
CPC分类号： H04N21/64715 , H04N21/23476 , H04N21/2541 , H04N21/266 , H04N21/4405 , H04N21/4627 , H04N21/8355
摘要： Methods and systems for cryptographic access control of multimedia video, include embedding as metadata access control policy (ACP) information, including authorization rules and cryptographic information tied to an encryption policy, into encrypted video. An authorized receiver device having credentials and/or capabilities matched to the authorization rules is able to extract the ACP information from the encrypted video and use it to decrypt and properly render the video.
摘要翻译：多媒体视频的密码访问控制方法和系统包括嵌入作为元数据访问控制策略（ACP）信息，包括与加密策略相关的授权规则和加密信息，加密视频。具有与授权规则匹配的凭证和/或能力的授权的接收机设备能够从加密的视频中提取ACP信息，并使用它来解密并适当地呈现视频。

3. 发明申请

WO2013103341A1 INCREASING VIRTUAL-MEMORY EFFICIENCIES 审中-公开
标题翻译：增加虚拟内存效率
公开(公告)号：WO2013103341A1
公开(公告)日：2013-07-11
申请号：PCT/US2012/020231
申请日：2012-01-04
申请人： Intel Corporation , THOMAS, Ramesh , TSENG, Kuo-Lang , SAHITA, Ravi L. , DURHAM, David M. , TALLAM, Madhukar
发明人： THOMAS, Ramesh , TSENG, Kuo-Lang , SAHITA, Ravi L. , DURHAM, David M. , TALLAM, Madhukar
IPC分类号： G06F9/30 , G06F9/46 , G06F12/08 , G06F15/80
CPC分类号： G06F12/145 , G06F9/468 , G06F12/1425 , G06F2009/45583 , G06F2009/45587
摘要： Embodiments of techniques and systems for increasing efficiencies in computing systems using virtual memory are described. In embodiments, instructions which are located in two memory pages in a virtual memory system, such that one of the pages does not permit execution of the instructions located therein, are identified and then executed under temporary permissions that permit execution of the identified instructions. In various embodiments, the temporary permissions may come from modified virtual memory page tables, temporary virtual memory page tables which allow for execution, and/or emulators which have root access. In embodiments, per-core virtual memory page tables may be provided to allow two cores of a computer processor to operate in accordance with different memory access permissions. In embodiments, a physical page permission table may be utilized to provide for maintenance and tracking of per-physical-page memory access permissions. Other embodiments may be described and claimed.
摘要翻译：描述了使用虚拟存储器提高计算系统效率的技术和系统的实施例。在实施例中，位于虚拟存储器系统中的两个存储器页面中的指令，使得页面中的一个不允许执行位于其中的指令，然后在允许执行所识别的指令的临时许可下执行。在各种实施例中，临时许可可来自修改的虚拟内存页表，允许执行的临时虚拟内存页表，和/或具有根访问的仿真器。在实施例中，可以提供每核心虚拟内存页表以允许计算机处理器的两个核心根据不同的存储器访问许可来操作。在实施例中，物理页面许可表可以用于提供对每个物理页面存储器访问许可的维护和跟踪。可以描述和要求保护其他实施例。

4. 发明申请

WO2013100965A1 A LOW-OVERHEAD CRYPTOGRAPHIC METHOD AND APPARATUS FOR PROVIDING MEMORY CONFIDENTIALITY, INTEGRITY AND REPLAY PROTECTION 审中-公开
标题翻译：提供记忆保密，完整性和重复保护的低成本克隆方法和设备
公开(公告)号：WO2013100965A1
公开(公告)日：2013-07-04
申请号：PCT/US2011/067590
申请日：2011-12-28
申请人： INTEL CORPORATION , CHHABRA, Siddhartha , SAVAGAONKAR, Uday , ROZAS, Carlos , NARENDRA TRIVEDI, Alpa , LONG, Men , DURHAM, David
发明人： CHHABRA, Siddhartha , SAVAGAONKAR, Uday , ROZAS, Carlos , NARENDRA TRIVEDI, Alpa , LONG, Men , DURHAM, David
IPC分类号： G06F21/20 , G06F21/24
CPC分类号： G06F21/64 , G06F12/1408 , G06F21/00 , G06F21/77
摘要： A method and system to provide a low-overhead cryptographic scheme that affords memory confidentiality, integrity and replay-protection by removing the critical read-after-write dependency between the various levels of the cryptographic tree. In one embodiment of the invention, the cryptographic processing of a child node can be pipelined with that of the parent nodes. This parallelization provided by the invention results in an efficient utilization of the cryptographic pipeline, enabling significantly lower performance overheads.
摘要翻译：一种提供低开销加密方案的方法和系统，其通过去除加密树的各个级别之间的关键读后依赖关系来提供内存机密性，完整性和重放保护。在本发明的一个实施例中，子节点的密码处理可以与母节点的密码处理流水线化。由本发明提供的这种并行化导致密码流水线的有效利用，能够显着降低性能开销。

5. 发明申请

WO2013100964A1 METHOD AND SYSTEM FOR PROTECTING MEMORY INFORMATION IN A PLATFORM 审中-公开
标题翻译：保护平台内存信息的方法和系统
公开(公告)号：WO2013100964A1
公开(公告)日：2013-07-04
申请号：PCT/US2011/067586
申请日：2011-12-28
申请人： INTEL CORPORATION , NARENDRA TRIVEDI, Alpa , DURHAM, David , LONG, Men , CHHABRA, Siddhartha , SAVAGAONKAR, Uday , ROZAS, Carlos
发明人： NARENDRA TRIVEDI, Alpa , DURHAM, David , LONG, Men , CHHABRA, Siddhartha , SAVAGAONKAR, Uday , ROZAS, Carlos
IPC分类号： G06F21/20 , G06F21/24
CPC分类号： G06F21/64 , G06F12/1408 , G06F21/78 , G06F21/79 , H04L9/0643 , H04L2209/12
摘要： A method and system to provide an effective, scalable and yet low-cost solution for Confidentiality, Integrity and Replay protection for sensitive information stored in a memory and prevent an attacker from observing and/or modifying the state of the system. In one embodiment of the invention, the system has strong hardware protection for its memory contents via XTS-tweak mode of encryption where the tweak is derived based on "Global and Local Counters". This scheme offers to enable die-area efficient Replay protection for any sized memory by allowing multiple counter levels and facilitates using small counter-sizes to derive the "tweak" used in the XTS encryption without sacrificing cryptographic strength.
摘要翻译：一种方法和系统，为存储在存储器中的敏感信息提供有效，可扩展且低成本的保密性，完整性和重放保护解决方案，并防止攻击者观察和/或修改系统的状态。在本发明的一个实施例中，系统通过经由XTS调整加密模式对其存储器内容具有强大的硬件保护，其中基于“全局和本地计数器”导出调整。该方案提供了通过允许多个计数器级别为任何大小的存储器提供芯片区域高效的重放保护，并有助于使用小型计数器来导出XTS加密中使用的“调整”，而不会牺牲加密强度。

6. 发明申请

WO2007079011A2 PAGE COLORING TO ASSOCIATE MEMORY PAGES WITH PROGRAMS 审中-公开
标题翻译：页面颜色与相关的内存页与程序
公开(公告)号：WO2007079011A2
公开(公告)日：2007-07-12
申请号：PCT/US2006/048940
申请日：2006-12-21
申请人： INTEL CORPORATION , DURHAM, David , SAHITA, Ravi , LARSON, Dylan , YAVATKAR, Rajendra
发明人： DURHAM, David , SAHITA, Ravi , LARSON, Dylan , YAVATKAR, Rajendra
IPC分类号： G06F12/10 , G06F21/00
CPC分类号： G06F12/1475 , G06F12/1491 , G06F21/74 , G06F21/79
摘要： Apparatuses and methods for page coloring to associate memory pages with programs are disclosed. In one embodiment, an apparatus includes a paging unit and an interface to access a memory. The paging unit includes translation logic and comparison logic. The translation logic is to translate a first address to a second address. The first address is to be provided by an instruction stored in a first page in the memory. The translation is based on an entry in .a data structure, and the entry is to include a base address of a second page in the memory including the second address. The comparison logic is to compare the color of the first page to the color of the second page. The color o the first page is to indicate association of the first page with a first program including the first instruction. The data structure entry is also to include the color of the second page to indicate association of the second page with the first program or a second program.
摘要翻译：公开了用于将内存页与程序相关联的页着色的装置和方法。在一个实施例中，一种装置包括寻呼单元和用于访问存储器的接口。寻呼单元包括翻译逻辑和比较逻辑。翻译逻辑是将第一个地址翻译成第二个地址。第一个地址由存储在第一页的指令提供。翻译是基于.a数据结构中的条目，并且该条目是在存储器中包括第二地址的第二页的基地址。比较逻辑是将第一页的颜色与第二页的颜色进行比较。第一页的颜色是指示第一页与包括第一指令的第一程序的关联。数据结构条目还包括第二页面的颜色以指示第二页面与第一程序或第二程序的关联。

7. 发明申请

WO2007078882A1 IDENTIFIER ASSOCIATED WITH MEMORY LOCATIONS FOR MANAGING MEMORY ACCESSES 审中-公开
标题翻译：与记忆管理存储器相关联的标识符
公开(公告)号：WO2007078882A1
公开(公告)日：2007-07-12
申请号：PCT/US2006/048022
申请日：2006-12-14
申请人： INTEL CORPORATION , DURHAM, David , SAHITA, Ravi , SAVAGAONKAR, Uday, R. , RAJAGOPAL, Priya , KHOSRAVI, Hormuzd, M.
发明人： DURHAM, David , SAHITA, Ravi , SAVAGAONKAR, Uday, R. , RAJAGOPAL, Priya , KHOSRAVI, Hormuzd, M.
IPC分类号： G06F12/14
CPC分类号： G06F12/1491
摘要： Embodiments of apparatuses, articles, methods, and systems for associating identifiers with memory locations for controlling memory accesses are generally described herein. Other embodiments may be described and claimed.
摘要翻译：这里通常描述用于将标识符与用于控制存储器访问的存储器位置相关联的装置，物品，方法和系统的实施例。可以描述和要求保护其他实施例。

8. 发明申请

WO2006011958A1 A MECHANISM FOR SEQUESTERING MEMORY FOR A BUS DEVICE 审中-公开
标题翻译：用于串行设备的序列存储器的机制
公开(公告)号：WO2006011958A1
公开(公告)日：2006-02-02
申请号：PCT/US2005/020509
申请日：2005-06-10
申请人： INTEL CORPORATION , DURHAM, David , RAJAGOPAL, Priya , SAHITA, Ravi
发明人： DURHAM, David , RAJAGOPAL, Priya , SAHITA, Ravi
IPC分类号： G06F12/06
CPC分类号： G06F13/1668 , G06F12/0284
摘要： According to one embodiment a computer system is disclosed. The computer system includes a central processing unit (CPU), a memory control device coupled to the CPU, a main memory device coupled to the memory control device, a bus coupled to the memory control device, and one or more devices, coupled to the bus. A physical segment of the main memory device is remapped to a bus device region of the main memory for exclusive use by the one or more devices.
摘要翻译：根据一个实施例，公开了一种计算机系统。计算机系统包括中央处理单元（CPU），耦合到CPU的存储器控制设备，耦合到存储器控制设备的主存储设备，耦合到存储器控制设备的总线以及耦合到存储器控制设备的一个或多个设备总线。主存储器件的物理段被重新映射到主存储器的总线设备区域，供一个或多个设备专用。

9. 发明申请

WO2012047936A3 ATTACHMENT SYSTEM FOR FRONTAL HELMET EXTENSION TO A HELMET 审中-公开
标题翻译：附件系统，用于正面护耳延伸到卫生间
公开(公告)号：WO2012047936A3
公开(公告)日：2014-04-03
申请号：PCT/US2011054824
申请日：2011-10-04
申请人： FOX HEAD INC , DURHAM DAVID , PRATS GABRIEL PABLO
发明人： DURHAM DAVID , PRATS GABRIEL PABLO
IPC分类号： A42B3/22
CPC分类号： A42B3/221 , A42B3/04 , A42B3/0406 , A42B3/227
摘要： An attachment system for securing a frontal helmet extension to protective headgear, the attachment system including one or more magnetic elements disposed on the helmet and/or frontal helmet extension and one or more complementary elements disposed on the helmet and/or frontal helmet extension and adapted to engage the magnetic elements. The magnetic elements and complementary elements are configured to detachably couple the frontal helmet extension to the helmet in a position wherein the frontal helmet extension extends forward from the helmet. The magnetic properties of the magnetic elements are adapted to magnetically attract the complementary elements so that the frontal helmet extension is effectively secured to the helmet during ordinary use of the helmet while allowing release of the frontal helmet extension from the helmet upon impact.
摘要翻译：一种用于将前额头盔延伸部固定到保护性头带上的附接系统，所述附接系统包括设置在所述头盔和/或前部头盔延伸部上的一个或多个磁性元件以及设置在所述头盔和/或前部头盔延伸部上的一个或多个互补元件，以接合磁性元件。磁性元件和互补元件被配置为在正面头盔延伸部从头盔向前延伸的位置将前额头盔延伸部可拆卸地连接到头盔。磁性元件的磁性能适于磁性地吸引互补元件，使得正常头盔延伸部在普通使用头盔期间有效地固定到头盔上，同时允许正面头盔延伸部在冲击时从头盔释放。

10. 发明申请

WO2013101188A1 MEMORY EVENT NOTIFICATION 审中-公开
标题翻译：内存事件通知
公开(公告)号：WO2013101188A1
公开(公告)日：2013-07-04
申请号：PCT/US2011/068118
申请日：2011-12-30
申请人： INTEL CORPORATION , SAHITA, Ravi L. , RASHEED, Yasser , SHANBHOGUE, Vedvyas , DURHAM, David M. , ROBINSON, Scott H. , SCHMITZ, Paul S.
发明人： SAHITA, Ravi L. , RASHEED, Yasser , SHANBHOGUE, Vedvyas , DURHAM, David M. , ROBINSON, Scott H. , SCHMITZ, Paul S.
IPC分类号： G06F21/22 , G06F21/20
CPC分类号： G06F12/10 , G06F21/554 , G06F21/6227 , G06F2212/251 , G06F2221/034
摘要： Embodiments of apparatuses and methods for memory event notification are disclosed. In one embodiment, a processor includes address translation hardware and memory event hardware. The address translation hardware is to support translation of a first address, used by software to access a memory, to a second address, used by the processor to access the memory. The memory event hardware is to detect an access to a registered portion of memory.
摘要翻译：公开了用于存储器事件通知的装置和方法的实施例。在一个实施例中，处理器包括地址转换硬件和存储器事件硬件。地址转换硬件是支持由软件使用的访问存储器的第一地址到由处理器使用以访问存储器的第二地址的翻译。存储器事件硬件是检测对存储器的注册部分的访问。

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