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1. 发明申请

WO2007026177A1 GAS-SENSING SEMICONDUCTOR DEVICES 审中-公开
标题翻译：气体传感半导体器件
公开(公告)号：WO2007026177A1
公开(公告)日：2007-03-08
申请号：PCT/GB2006/050199
申请日：2006-07-12
申请人： UNIVERSITY OF WARWICK , GARDNER, Julian William , UDREA, Florin , IWAKI, Takao , COVINGTON, James Anthony
发明人： GARDNER, Julian William , UDREA, Florin , IWAKI, Takao , COVINGTON, James Anthony
IPC分类号： G01N27/12 , G01N27/414 , G01N33/00
CPC分类号： G01N33/0047 , G01N27/14 , G01N33/0031
摘要： Gas-Sensing Semiconductor Devices A gas-sensing semiconductor device 1' is fabricated on a silicon substrate 2' having a thin silicon dioxide insulating layer 3' in which a resistive heater 6 made of doped single crystal silicon formed simultaneously with source and drain regions of CMOS circuitry is embedded. The device 1' includes a sensing area provided with a gas-sensitive layer 9' separated from the heater 6' by an insulating layer 4'. As one of the final fabrication steps, the substrate 2' is back-etched so as to form a thin membrane in the sensing area. The heater 6' has a generally circular-shaped structure surrounding a heat spreading plate 16', and consists of two sets 20', 21' of meandering resistors having arcuate portions nested within one another and interconnected in labyrinthine form. The fabrication of the heater at the same time as the source and drain regions of CMOS circuitry is particularly advantageous in that the gas-sensing semiconductor device is produced without requiring any fabrication steps in addition to those already employed in the IC processing apart from a post-CMOS back etch and deposition of the gas-sensitive layer. The circular design is advantageous in that it is the best solution to minimise the size of the membrane at fixed power loss and heated area.
摘要翻译：气体感测半导体器件气体感测半导体器件1'制造在具有薄二氧化硅绝缘层3'的硅衬底2'上，其中由掺杂单晶硅制成的电阻加热器6与源极和漏极区域同时形成嵌入CMOS电路。装置1'包括具有通过绝缘层4'与加热器6'分离的气敏层9'的感测区域。作为最终制造步骤之一，衬底2'被反蚀刻以在感测区域中形成薄膜。加热器6'具有围绕散热板16'的大致圆形结构，并且由具有彼此嵌套并且以迷宫形式互连的弓形部分的曲折电阻器的两组20'，21'组成。与CMOS电路的源极和漏极区域同时地制造加热器是特别有利的，因为除了在后处理中已经用于IC处理中的那些之外，制造气体感测半导体器件不需要任何制造步骤 -CMOS背蚀刻和气敏层的沉积。圆形设计是有利的，因为它是在固定功率损耗和加热面积下最小化膜尺寸的最佳解决方案。

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