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1. 发明申请

WO2004075057A1 A METHOD AND APPARATUS FOR DETECTING AND CONCEALING DATA ERRORS IN STORED DIGITAL DATA 审中-公开
标题翻译：用于检测和隐藏存储的数字数据中的数据错误的方法和装置
公开(公告)号：WO2004075057A1
公开(公告)日：2004-09-02
申请号：PCT/SG1997/000024
申请日：1997-06-14
申请人： THOMSON CONSUMER ELECTRONICS, INC. , PETERSON, Eric, Carl , CSICSATKA, Tibor, George , CHEAH, Sin, Hui
发明人： PETERSON, Eric, Carl , CSICSATKA, Tibor, George , CHEAH, Sin, Hui
IPC分类号： G06F11/00
CPC分类号： G11B20/10009 , G11B20/1813
摘要： A Method and apparatus is disclosed for detecting and concealing errors in stored digital samples. A multibit digital input sample is received and an error detecting code, corresponding to that input sample is calculated. Then a multibit digital storage sample is generated by substituting the error detecting code for the same number of least significant bits of the input sample. The storage sample is then stored in a memory device. A previously stored sample is retrieved from the memory device and is analyzed to detect whether an error has occurred. If an error is detected, a substitute sample is produced for the retrieved sample, otherwise the retrieved sample is produced.
摘要翻译：公开了一种用于检测和隐藏存储的数字样本中的错误的方法和装置。接收多位数字输入采样，并计算与该输入采样相对应的检错码。然后通过将错误检测码替换为输入样本的相同数量的最低有效位来生成多位数字存储样本。然后将存储样品存储在存储器件中。从存储器件检索先前存储的样本，并进行分析以检测是否发生错误。如果检测到错误，则为检索到的样本生成替代样本，否则生成检索到的样本。

2. 发明申请

WO1999062173A1 SYNCHRONOUS RESET GENERATION IN AN ASYNCHRONOUS SYSTEM 审中-公开
标题翻译：同步系统中的同步复位产生
公开(公告)号：WO1999062173A1
公开(公告)日：1999-12-02
申请号：PCT/US1999010671
申请日：1999-05-13
申请人： THOMSON CONSUMER ELECTRONICS, INC.
发明人： THOMSON CONSUMER ELECTRONICS, INC. , RAMADOSS, Vijaya , SUMMERS, Jeffry, Richard , MURPHY, Peter, Michael
IPC分类号： H03K05/135
CPC分类号： H03K5/135
摘要： A synchronous reset signal (16) of a desired duration is generated from an asynchronous reset signal (12). When the asynchronous reset signal becomes active, the synchronous reset signal also becomes active. A counter (10) holds the synchronous reset signal active for a desired number of clock cycles. The clock (14) may be absent or invalid when the asynchronous reset signal is active.
摘要翻译：从异步复位信号（12）产生期望持续时间的同步复位信号（16）。当异步复位信号变为有效时，同步复位信号也变为有效。计数器（10）将同步复位信号保持有效期望的时钟周期数。当异步复位信号有效时，时钟（14）可能不存在或无效。

3. 发明申请

WO1999033273A1 LOW NOISE ENCODING AND DECODING METHOD 审中-公开
标题翻译：低噪声编码和解码方法
公开(公告)号：WO1999033273A1
公开(公告)日：1999-07-01
申请号：PCT/US1997023992
申请日：1997-12-23
申请人： THOMSON CONSUMER ELECTRONICS, INC. , YU, Haoping , McNEELY, David, Lowell , BEYERS, Billy, Wesley, Jr.
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/26
CPC分类号： H04N5/14 , H04N7/012 , H04N19/124 , H04N19/137 , H04N19/14 , H04N19/146 , H04N19/149 , H04N19/15 , H04N19/152 , H04N19/16 , H04N19/172 , H04N19/174 , H04N19/179 , H04N19/182 , H04N19/30 , H04N19/527 , H04N19/59 , H04N19/60 , H04N19/80
摘要： An adaptive digital image processor (22) precedes an MPEG2 encoder (24). The processor receives a high definition (1920 by 1080 pixels per image) video signal intended for broadcast or storage, and adaptively low-pass filters the signal. The signal is subjected to low-pass two-dimensional filtering (223) to eliminate encoding artifacts and related noise. The video signal is then horizontally down-sampled (226) to create a lower resolution hybrid signal (1280 by 1080 pixels per image). A receiver decodes and decompresses the hybrid signal. The hybrid signal is upsampled to its original resolution using existing hardware and software with a software modification.
摘要翻译：自适应数字图像处理器（22）在MPEG2编码器（24）之前。处理器接收用于广播或存储的高分辨率（每像素1920×1080像素）视频信号，并自适应地对信号进行低通滤波。该信号经受低通二维滤波（223）以消除编码伪像和相关噪声。然后，视频信号被水平下采样（226）以产生较低分辨率混合信号（每图像1280×1080像素）。接收机解码和解压缩混合信号。混合信号通过软件修改使用现有的硬件和软件上采样到其原始分辨率。

4. 发明申请

WO1998027743A1 SELECTIVE COMPRESSION NETWORK IN AN MPEG COMPATIBLE DECODER 审中-公开
标题翻译： MPEG兼容解码器中的选择性压缩网络
公开(公告)号：WO1998027743A1
公开(公告)日：1998-06-25
申请号：PCT/US1997023075
申请日：1997-12-15
申请人： THOMSON CONSUMER ELECTRONICS, INC. , SCHULTZ, Mark, Alan , KRANAWETTER, Greg, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/50
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： An MPEG decoder (14, 18, 22) in a high definition television receiver decodes and decompresses MPEG coded data to produce decompressed image pixel blocks, and includes a motion compensation network (90, ...) coupled to a frame memory (60) to produce finally decoded pixel data for display. The decompressed MPEG data is recompressed by plural parallel recompressors (40, 42) prior to storage in frame memory. Each recompressor receives a datastream of interleaved pixel data (24, 27; Fig. 5), and predicts and compresses interleaved pixel values (a, c) during each clock cycle, respectively (Fig. 20, 27). One of the recompressors (42) is de-energized in a reduced data processing mode when pixel data is subsampled (36, 38) prior to recompression. Subsampled data is re-ordered (43) prior to recompression. Multiple parallel decompressors (80, 82, 84) coupled to the frame memory provide pixel data to the motion processing network. A control unit (356, 360, 364, Fig. 23) insures an uninterrupted interleaved data flow to the decompressors by repeating last valid data when source data is interrupted.
摘要翻译：高分辨率电视接收机中的MPEG解码器（14,18,22）对MPEG编码数据进行解码和解压缩以产生解压缩的图像像素块，并且包括耦合到帧存储器（60）的运动补偿网络（90，...）以产生用于显示的最终解码的像素数据。解压缩的MPEG数据在存储在帧存储器中之前由多个并行的再压缩器（40,42）重新压缩。每个再压缩器接收交错像素数据（24,27;图5）的数据流，并分别在每个时钟周期期间预测和压缩交错像素值（a，c）（图20,27）。当在再压缩之前对像素数据进行二次采样（36,38）时，其中一个再压缩器（42）在减小的数据处理模式中被断电。在重新压缩前重新排序（43）采样数据。耦合到帧存储器的多个并行解压缩器（80,82,84）向运动处理网络提供像素数据。当源数据被中断时，控制单元（356,360,364，图23）通过重复最后的有效数据来确保不间断的交错数据流到解压缩器。

5. 发明申请

WO1998027734A1 EFFICIENT FIXED-LENGTH BLOCK COMPRESSION AND DECOMPRESSION 审中-公开
标题翻译：有效的固定长度块压缩和解压缩
公开(公告)号：WO1998027734A1
公开(公告)日：1998-06-25
申请号：PCT/US1997017470
申请日：1997-09-30
申请人： THOMSON CONSUMER ELECTRONICS, INC. , KRANAWETTER, Greg, Alan , SCHULTZ, Mark, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/32
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： Compression and decompression apparatus and methods for producing fixed-length compressed data blocks with variable-length compression are described. The compression system receives and N-bit word from a data block (60) and determines the variable compression length for the word (62). A bit counter keeps track of the number of bits remaining (64) and determines if sufficient bits have been used to ensure that the fixed-length compressed data block will be filled (66). If so, the compressed word is output (70). If not, prior to output the compressed word is padded with an appropriate number of bits (68), which may be null bits.
摘要翻译：描述了用于产生具有可变长度压缩的固定长度压缩数据块的压缩和解压缩装置和方法。压缩系统从数据块（60）接收N位字，并确定字（62）的可变压缩长度。位计数器跟踪剩余的位数（64），并确定是否使用足够的位来确保固定长度的压缩数据块将被填充（66）。如果是，则输出压缩字（70）。如果不是，在输出之前，用适当数量的位（68）填充压缩字，其可以是空位。

6. 发明申请

WO1998027724A1 VIDEO SIGNAL PROCESSING SYSTEM PROVIDING INDEPENDENT IMAGE MODIFICATION IN A MULTI-IMAGE DISPLAY 审中-公开
标题翻译：在多图像显示器中提供独立图像修改的视频信号处理系统
公开(公告)号：WO1998027724A1
公开(公告)日：1998-06-25
申请号：PCT/US1997022722
申请日：1997-12-10
申请人： THOMSON CONSUMER ELECTRONICS, INC.
发明人： THOMSON CONSUMER ELECTRONICS, INC. , RUMREICH, Mark, Francis
IPC分类号： H04N05/45
CPC分类号： H04N5/45 , H04N21/4316 , H04N21/4318 , H04N21/4542 , H04N21/4755 , H04N21/84
摘要： Video signal processing apparatus provides for blanking main and auxiliary images in a multi-image display, e.g., a PIP or POP display, independently. The blanking may be part of a V-chip feature in which blanking occurs in response to auxiliary information, such as XDS data, that is included in a video signal to indicate the content of television programming. Main image blanking occurs only during active video intervals to prevent corrupting sync information. In a system that produces the main image from various types of video signals, e.g., composite video and s-video, that require separate signal processing paths, main image blanking capability is provided in one signal path only, such as the composite video path. The blanking capability is activated and the associated signal path is selected to provide main picture blanking regardless of which type of signal is providing the main picture.
摘要翻译：视频信号处理装置独立地提供在多图像显示器（例如PIP或POP显示器）中消隐主图像和辅助图像。消隐可以是V芯片特征的一部分，其中响应于包括在视频信号中的辅助信息（例如XDS数据）发生消隐以指示电视节目的内容。主图像消隐仅在活动视频间隔期间发生，以防止损坏同步信息。在从需要单独的信号处理路径的各种类型的视频信号（例如，复合视频和S-视频）产生主图像的系统中，仅在一个信号路径中提供主图像消隐能力，例如复合视频路径。消隐功能被激活，并且选择相关联的信号路径以提供主画面消隐，而不管哪种类型的信号提供主画面。

7. 发明申请

WO1998024237A1 A DECODING APPARATUS/METHOD AND DATA FORMAT FOR PROCESSING AND STORING ENCRYPTED VIDEO DATA 审中-公开
标题翻译：解码设备/用于处理和存储加密视频数据的方法和数据格式
公开(公告)号：WO1998024237A1
公开(公告)日：1998-06-04
申请号：PCT/US1997019375
申请日：1997-10-28
申请人： THOMSON CONSUMER ELECTRONICS, INC.
发明人： THOMSON CONSUMER ELECTRONICS, INC. , BLATTER, Harold , HORLANDER, Thomas, Edward , BRIDGEWATER, Kevin, Elliott , DEISS, Michael, Scott
IPC分类号： H04N07/167
CPC分类号： H04N21/4181 , H04N5/4401 , H04N7/1675 , H04N21/4147 , H04N21/42646 , H04N21/4345 , H04N21/4405 , H04N21/4623
摘要： A decoder (25) conditional access system (115, 130, 50) incorporates different encryption systems for providing access to programs derived from different sources. A conditional access processor (115, 130, 50) for processing encrypted program data and an associated encryption code includes a first algorithm means (130, 115) for decrypting the encryption code to provide an encryption key. The conditional access processor also includes a second algorithm means (115, 130) for encrypting the encryption key and the second encryption algorithm is different to the first encryption algorithm. A datastream representing the program is generated (33, 115, 110, 60, 65, 50) from encrypted program data and an associated encryption code. The encryption code is decrypted (115, 130) to provide an encryption key using a first algorithm. The encryption key is encrypted (115, 130) using a second algorithm different to the first encryption algorithm and the program datastream is formed from the encrypted program data and the encrypted encryption key. The program datastream is decrypted by selecting between a first and a second decryption algorithm and by decrypting (115, 130) the encryption code to provide an encryption key. The encryption key is used to decrypt (50, 115) the encrypted program. A storage medium (105) data format for recording encrypted program data is also disclosed.
摘要翻译：解码器（25）条件访问系统（115,130,50）包括用于提供对从不同来源导出的节目的访问的不同加密系统。用于处理加密程序数据和相关联的加密代码的条件访问处理器（115,130,50）包括用于解密加密代码以提供加密密钥的第一算法装置（130,115）。条件访问处理器还包括用于加密加密密钥的第二算法装置（115,130），第二加密算法与第一加密算法不同。从加密程序数据和相关联的加密代码生成表示程序的数据流（33,115,110,60,65,50）。加密代码被解密（115,130）以使用第一算法提供加密密钥。使用与第一加密算法不同的第二算法对加密密钥进行加密（115,130），并且从加密的程序数据和加密的加密密钥形成程序数据流。通过在第一和第二解密算法之间进行选择并解密（115,130）加密代码以提供加密密钥来解密程序数据流。加密密钥用于解密（50,115）加密程序。还公开了用于记录加密程序数据的存储介质（105）数据格式。

8. 发明申请

WO1998021883A1 ELECTRON BEAM FOCUS VOLTAGE CIRCUIT 审中-公开
标题翻译：电子束聚焦电压电路
公开(公告)号：WO1998021883A1
公开(公告)日：1998-05-22
申请号：PCT/US1997020249
申请日：1997-11-10
申请人： THOMSON CONSUMER ELECTRONICS, INC.
发明人： THOMSON CONSUMER ELECTRONICS, INC. , FERNSLER, Ronald, Eugene
IPC分类号： H04N03/26
CPC分类号： H04N3/27 , H04N3/26
摘要： There is provided a circuit and method for generating a focus voltage having a predetermined waveform and magnitude for application to an electron beam focus means of a cathode ray tube having a display surface. A horizontal deflection current having a predetermined waveform and a frequency which is selectable over a predetermined range of frequencies is used to generate substantially horizontal scan lines on the display surface of the cathode ray tube by causing at least one electron beam to sweep across the display surface. The circuit has an input for receiving a signal having a current waveform representative of the waveform and frequency of the horizontal deflection current. In response to the received signal, the circuit produces a focus voltage output, the waveform and magnitude of which remain substantially constant over the range of selected frequencies of the horizontal deflection current.
摘要翻译：提供了一种产生具有预定波形和幅度的聚焦电压的电路和方法，用于应用于具有显示表面的阴极射线管的电子束聚焦装置。使用具有预定波形的水平偏转电流和在预定频率范围内可选择的频率，以通过使至少一个电子束扫过显示表面而在阴极射线管的显示表面上产生基本水平的扫描线。电路具有用于接收具有代表水平偏转电流的波形和频率的电流波形的信号的输入。响应于接收到的信号，电路产生聚焦电压输出，其波形和幅度在水平偏转电流的选定频率的范围内保持基本恒定。

9. 发明申请

WO1998021811A1 FAULT CONTROL CIRCUIT FOR SWITCHED POWER SUPPLY 审中-公开
标题翻译：用于开关电源的故障控制电路
公开(公告)号：WO1998021811A1
公开(公告)日：1998-05-22
申请号：PCT/US1997021009
申请日：1997-11-12
申请人： THOMSON CONSUMER ELECTRONICS, INC.
发明人： THOMSON CONSUMER ELECTRONICS, INC. , WILLIAMS, Kevin, Michael , GEORGE, John, Barrett
IPC分类号： H02M01/00
CPC分类号： H02M1/32 , H02M3/33523
摘要： A voltage source (RAW B ), a transformer (T1) and a switching controller (U1) are coupled for switched mode generation of a regulated output supply voltage. A switching circuit (R5, R6, R7, Q3, Q4, Z3, U3) responsive to an on/off signal (+23 v-RUN) turns the power supply on and off by establishing a conductive condition in a conductive path. A fault detector (42) establishes a non conductive condition in a part of the conduction path responsive to an overload condition. A delay circuit (40) establishes a conductive condition in an auxiliary conduction path for a period of time after the power supply is turned on. The auxiliary conduction path becomes non-conductive when the fault detector establishes a conductive condition in the part of the conduction path. The part of the conduction path remains conductive absent an overload condition. A latch arrangement including the delay circuit maintains the non-conductive condition in the auxiliary conduction path until the power supply is turned off.
摘要翻译：耦合电压源（RAW B +），变压器（T1）和开关控制器（U1），用于产生调节输出电源电压的开关模式。响应于开/关信号（+23V-RUN）的开关电路（R5，R6，R7，Q3，Q4，Z3，U3）通过在导电路径中建立导电条件来打开和关闭电源。故障检测器（42）响应于过载条件在导通路径的一部分中建立非导通状态。延迟电路（40）在电源接通之后的一段时间内在辅助导电路径中建立导电状态。当故障检测器在导电路径的一部分中建立导电状态时，辅助导电路径变得不导通。传导路径的一部分在没有过载条件的情况下保持导通。包括延迟电路的锁存装置保持辅助传导路径中的非导通状态，直到电源关闭。

10. 发明申请

WO1998017057A1 APPARATUS AND METHOD FOR GENERATING ON-SCREEN-DISPLAY MESSAGES USING FIELD DOUBLING 审中-公开
标题翻译：使用现场重复生成屏幕显示消息的装置和方法
公开(公告)号：WO1998017057A1
公开(公告)日：1998-04-23
申请号：PCT/US1996016502
申请日：1996-10-16
申请人： THOMSON CONSUMER ELECTRONICS, INC. , KNOX, Michael, Dwayne , DINWIDDIE, Aaron, Hal
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N05/445
CPC分类号： H04N5/44508 , H04N5/44504 , H04N7/012
摘要： An apparatus and concomitant method for generating an OSD message by constructing an OSD bitstream defining a single field of OSD data. The OSD bitstream contains an OSD header and OSD data. An OSD unit retrieves pixel control information from the OSD header which is programmed by a processor of a decoding/displaying system. The OSD header contains information including various pointers, that are used to provide instructions as to the treatment of the OSD data. If a top field pointer and a bottom field pointer are set to an identical value in the OSD header, then the OSD unit will repeat each OSD line in the other field for an OSD region.
摘要翻译：一种用于通过构造定义OSD数据的单个字段的OSD比特来生成OSD消息的装置和并发方法。 OSD比特流包含OSD头部和OSD数据。 OSD单元从由解码/显示系统的处理器编程的OSD标题中检索像素控制信息。 OSD标题包含包括各种指针的信息，其用于提供关于OSD数据的处理的指令。如果在OSD头部中将顶部场指针和底场指针设置为相同的值，则OSD单元将重复OSD区域的另一个场中的每个OSD行。

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