会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 37. 发明申请
    • TRIPLE-GATE FLASH EEPROM MEMORY AND METHOD FOR MAKING SAME
    • 三栅闪存EEPROM存储器及其制造方法
    • WO1994001892A1
    • 1994-01-20
    • PCT/FR1993000667
    • 1993-07-01
    • COMMISSARIAT A L'ENERGIE ATOMIQUEHARTMANN, Joël
    • COMMISSARIAT A L'ENERGIE ATOMIQUE
    • H01L27/115
    • H01L27/11521G11C16/0416H01L27/115
    • A memory including a semiconductor substrate (4), an array of memory cells (2) mutually electrically insulated by side insulators (5), wherein each memory cell includes a gate stack (19) consisting of a gate insulator (6), a floating gate (8) and a control gate (10) separated by an electrical insulator (12) between the gates, said gate insulator being arranged between the floating gate and the substrate, a source (16) and a drain (14) formed in the substrate on either side of said stack and outside the side insulators, an erasing gate (22) located above the source (16) in partial overlap with the stack, and electrically insulated from the source and said stack by a thin insulator (18), as well as conductive strips for applying electrical signals to the gate stacks, erasing gates, sources and drains.
    • 一种存储器,包括半导体衬底(4),由侧绝缘体(5)相互电绝缘的存储器单元阵列(2),其中每个存储单元包括由栅极绝缘体(6),浮置 栅极(8)和由栅极之间的电绝缘体(12)分开的控制栅极(10),所述栅极绝缘体布置在浮置栅极和衬底之间,源极(16)和漏极(14)形成在栅极 位于所述堆叠的任一侧上的衬底和位于所述侧绝缘体外部的擦除栅极(22),位于所述源极(16)上方,与所述堆叠部分重叠,并且通过薄绝缘体(18)与所述源极和所述堆叠电绝缘, 以及用于将电信号施加到栅极堆叠,擦除栅极,源极和漏极的导电条。