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    • 32. 发明申请
    • TRENCH MOSFET WITH RECESSED CLAMPING DIODE
    • 带有钳位二极管的TRENCH MOSFET
    • WO2006011882A1
    • 2006-02-02
    • PCT/US2004/021211
    • 2004-06-30
    • ADVANCED ANALOGIC TECHNOLOGIES, INC.ADVANCED ANALOGIC TECHNOLOGIES (HONG KONG) LIMITEDWILLIAMS, RichardCORNELL, MichaelCHAN, Wai Tien
    • WILLIAMS, RichardCORNELL, MichaelCHAN, Wai Tien
    • H01L27/108
    • H01L29/7813H01L29/0696H01L29/0878H01L29/42368H01L29/66734H01L29/7808
    • In a trench-gated MOSFET (840) including an epitaxial layer (842) over a substrate (841) of like conductivity and trenches containing thick bottom oxide (846), sidewall gate oxide (850), and conductive gates (844), body regions (843) of the complementary conductivity are shallower than the gates (844), and clamp regions (853) are deeper and more heavily doped than the body regions but shallower than the trenches. Zener junctions clamp a drain-source voltage lower than the FPI breakdown of body junctions near the trenches, but the zener junctions, being shallower than the trenches, avoid undue degradation of the maximum drain-source voltage. The epitaxial layer (842) may have a dopant concentration that increases step-wise or continuously with depth. Chained implants of the body (843) and clamp regions (853) permit accurate control of dopant concentrations and of junction depth. Alternative fabrication processes permit implantation of the body (843) and clamp regions (853) before gate bus (852) formation or through the gate bus (852) after gate bus formation.
    • 在包括具有类似导电性的衬底(841)上的外延层(842)和包含厚底部氧化物(846),侧壁栅极氧化物(850)和导电栅极(844)的沟槽的沟槽选通MOSFET(840)中, 互补电导率的区域(843)比栅极(844)浅,并且钳位区域(853)比体区域更深且更重掺杂,但是比沟槽浅。 齐纳结钳位漏极 - 源极电压低于沟槽附近的主体结的FPI击穿,但是比沟槽更浅的齐纳结避免了最大漏极 - 源极电压的不适当的降低。 外延层(842)可以具有随深度逐步增加或连续增加的掺杂剂浓度。 身体(843)和夹紧区域(853)的链式植入允许准确控制掺杂剂浓度和结深度。 替代的制造工艺允许在栅极总线(852)形成之后或在栅极总线形成之后通过栅极总线(852)注入主体(843)和钳位区域(853)。