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    • 2. 发明授权
    • Variable delay line with microstrip delay elements selectively connected
by sliding switches
    • 具有微带延迟元件的可变延迟线通过滑动开关选择性连接
    • US5339056A
    • 1994-08-16
    • US996400
    • 1992-12-23
    • Mitsunori KanekoYukinori Miyake
    • Mitsunori KanekoYukinori Miyake
    • H03H7/34H03H7/20
    • H03H7/345
    • A variable delay line includes a package housing (61); a circuit board (68) provided within the package housing; a ground conductor pattern (69) provided on a backside of the circuit board; an electrical circuit (70) provided on a top surface of the circuit board and including input and output terminal lands (72, 75); a plurality of pairs of shunt lands (76), each pair being connected by a microstrip line (77); a plurality of pairs of element connection lands (78), each being connected to a delay element (79, 80, 81); and a plurality of pairs of connecting contacts (67) movable between a first position in which the connecting contacts connect the shunt microstrip line in series to the electrical circuit and a second position in which the connecting contacts connect the delay element in series to the electrical circuit while disconnecting the shunt microstrip line from the electrical circuit, eliminating major mismatching elements from the delay line, thereby improving high-frequency characteristics.
    • 可变延迟线包括封装壳体(61); 设置在所述封装壳体内的电路板(68) 设置在电路板的背面的接地导体图案(69); 设置在所述电路板的顶表面上并且包括输入和输出端子平台(72,75)的电路(70); 多对分路平台(76),每对通过微带线(77)连接; 多个元件连接平台(78),每一对连接到延迟元件(79,80,81); 以及多对连接触点(67),其可在第一位置和第二位置之间移动,第一位置中连接触点将并联微带线与电路串联连接;第二位置,其中连接触点将延迟元件串联连接到电气 同时将并联微带线与电路断开,消除了延迟线上的主要失配元件,从而改善了高频特性。
    • 4. 发明授权
    • Delay line device and a method for producing the same
    • 延迟线装置及其制造方法
    • US5146191A
    • 1992-09-08
    • US712546
    • 1991-06-10
    • Harufumi MandaiYoshikazu ChigodoAtsushi Tojo
    • Harufumi MandaiYoshikazu ChigodoAtsushi Tojo
    • H01P9/00H01P11/00H03H7/34
    • H03H7/34
    • A delay line device for delaying signal transmission. A lamination comprises an uppermost grounding electrode, a lowermost grounding electrode, a plurality of strip-line conductors, a plurality of intermediate grounding electrodes, dielectric layers, and protective layers. The strip-line conductors and the intermediate grounding electrodes are accumulated alternately and are interposed between the uppermost and the lowermost grounding electrodes. The dielectric layers are each interposed between each adjacent pair of the strip-line conductor and the intermediate grounding electrode. The protective layers are respectively provided on outer surfaces of the uppermost and the lowermost grounding electrodes. The strip-line conductors are connected via a through hole to form a strip-line conductor series and both ends of the series are extended onto a side surface of the lamination. An external input electrode is connected to one of the ends of the strip-line conductor series on the side surface of the lamination. An external output electrode is connected to the other end of the strip-line conductor series on the side surface of the lamination. An external grounding electrode is connected to connecting portions of the uppermost, lowermost and intermediate grounding electrodes on the side surface of the lamination.
    • 用于延迟信号传输的延迟线设备。 叠层包括最上面的接地电极,最下面的接地电极,多条带状导体,多个中间接地电极,电介质层和保护层。 带状线导体和中间接地电极交替堆积并插入在最上层和最下层的接地电极之间。 电介质层各自插入在相邻的一对带状线导体和中间接地电极之间。 保护层分别设置在最上面和最下面的接地电极的外表面上。 带状导体通过通孔连接以形成带状导体序列,并且串联的两端延伸到层压体的侧表面。 外部输入电极连接到层叠体的侧面上的带状导体序列的一端。 外部输出电极连接到层叠体的侧面上的带状导体序列的另一端。 外部接地电极连接到层叠体的侧表面上的最上层,最下层和中间的接地电极的连接部分。
    • 5. 发明授权
    • Distributed constant type delay line device and a manufacturing method
thereof
    • 分布式恒定延迟线装置及其制造方法
    • US4949057A
    • 1990-08-14
    • US384729
    • 1989-07-25
    • Taeko IshizakaYoshihiko KasaiHajime Okamura
    • Taeko IshizakaYoshihiko KasaiHajime Okamura
    • H01P9/00H01P11/00H03H7/34
    • H03H7/34
    • A distributed constant type delay line device comprises a first base body with a first cutout portion at a bottom corner thereof, a first delay path pattern provided on a first side of the first base body, a first ground conductor provided on a second side of the first base body, a second base body with a second cutout portion at a bottom corner thereof in correspondence to cutout portion of the first base body, a second delay path pattern provided on a first side of the second base body, a second ground conductor provided on a second side of the second base body, in which the second base body is combined with the first base body by contacting the second ground conductor to the first ground conductor such that the first cutout portion on the first base body exposes a part of the second ground conductor at another bottom corner of the second base body and that the second cutout portion exposes a part of the first ground conductor at another bottom corner of the first base body, a pair of input/output pins respectively provided on the first and second base bodies for connection with respective first ends of the first and second delay path patterns, a single jumper provided so as to bridge the first and second base bodies for connecting a second end of the first delay path pattern to a second end of the second delay path pattern, and a pair of ground pins respectively provided on the first and second base bodies for connection with exposed parts of the first and second ground conductors.
    • 6. 发明授权
    • Transducer device
    • 传感器装置
    • US4477783A
    • 1984-10-16
    • US409429
    • 1982-08-19
    • William E. Glenn
    • William E. Glenn
    • B06B1/06H03H7/34H03H9/13H03H9/15
    • B06B1/0611
    • The disclosure is directed to an ultrasonic transducer device that includes a plurality of layers of piezoelectric material. A plurality of conductive electrodes are disposed on the layers of piezoelectric material such that each layer of piezoelectric material has electrodes on opposing surfaces thereof. A series string of electronic delay means is provided, and has successive stages that are respectively coupled between pairs of the electrodes. An input/output terminal is coupled to an end of the series string of electronic delay means. The time delay of each electronic delay means is selected as a function of the ultrasonic wave propagation time through the piezoelectric material across which the electronic delay means is coupled. Preferably, the time delay of each electronic delay means is substantially equal to the ultrasonic wave propagation time through the piezoelectric material across which the electronic delay means is coupled. In one embodiment, a plurality of layers of insulating material are respectively disposed between the electrode layers of adjacent layers of piezoelectric material. The layers of piezoelectric material have an inherent polarization and, in this embodiment, the polarization of each layer is in the same direction. In another embodiment, a single electrode is "shared" at the interface between adjacent layers of piezoelectric material. In this embodiment, the polarization direction alternates in successive layers.
    • 本发明涉及一种包括多层压电材料的超声波换能器装置。 多个导电电极设置在压电材料层上,使得各层压电材料在其相对的表面上具有电极。 提供串联的电子延迟装置,并且具有连续的阶段,其分别耦合在成对的电极之间。 输入/输出端耦合到电子延迟装置串联串的一端。 选择每个电子延迟装置的时间延迟作为通过耦合电子延迟装置的压电材料的超声波传播时间的函数。 优选地,每个电子延迟装置的时间延迟基本上等于通过耦合电子延迟装置的压电材料的超声波传播时间。 在一个实施例中,多个绝缘材料层分别设置在相邻的压电材料层的电极层之间。 压电材料层具有固有极化,并且在该实施例中,每个层的极化处于相同的方向。 在另一个实施例中,单个电极在相邻的压电材料层之间的界面“共享”。 在本实施例中,偏振方向在连续的层中交替。