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1. 发明申请

US20040262256A1 DETECTION OF HARDMASK REMOVAL USING A SELECTIVE ETCH 失效
标题翻译：使用选择性蚀刻检测硬质合金去除
公开(公告)号：US20040262256A1
公开(公告)日：2004-12-30
申请号：US10604136
申请日：2003-06-27
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Jeffrey P. Gambino , Anthony K. Stamper , Richard E. Wistrom
IPC分类号： H01B013/00
CPC分类号： H01L22/24 , H01L21/31116 , H01L21/3212 , H01L21/76829 , H01L21/76832 , H01L21/76838 , H01L21/7684 , H01L2924/0002 , H01L2924/00
摘要： A method of creating electrical shorts within an interconnection structure, using a selective etch, to detect a region that is missing a protective hardmask in order to prevent future use of the defective device.
摘要翻译：使用选择性蚀刻在互连结构内产生电短路的方法来检测缺少保护性硬掩模的区域，以防止将来使用有缺陷的器件。

2. 发明申请

US20040245211A1 Method for forming conducting layer onto substrate 审中-公开
标题翻译：在导电层上形成导电层的方法
公开(公告)号：US20040245211A1
公开(公告)日：2004-12-09
申请号：US10483933
申请日：2004-06-25
发明人： Peter Sidney Albert Evans , David Harrison
IPC分类号： H01B013/00
CPC分类号： H05K3/246 , H05K3/182
摘要： A process for forming a conductive layer on a substrate is disclosed which comprises the steps of providing an ink comprising a metal oxide in particulate form suspended in a mixture of a resin and an organic solvent, depositing the ink on a substrate by means of a lithographic printing process, and applying a reducing agent to the ink to reduce at least some of said metal oxide to metal. Preferably, a mixture of an alkyd and a non-alkyd resin is employed.
摘要翻译：公开了一种在基底上形成导电层的方法，其包括以下步骤：提供包含悬浮在树脂和有机溶剂的混合物中的颗粒形式的金属氧化物的油墨，通过平版印刷法将油墨沉积在基材上印刷工艺，以及将还原剂施加到所述油墨上以将至少一些所述金属氧化物还原成金属。优选使用醇酸树脂和非醇酸树脂的混合物。

3. 发明申请

US20040188378A1 Bumping process 有权
标题翻译：冲击过程
公开(公告)号：US20040188378A1
公开(公告)日：2004-09-30
申请号：US10753318
申请日：2004-01-09
申请人： Advanced Semiconductor Engineering, Inc.
发明人： En-Chieh Wu , Chao-Fu Weng , Chi-Long Tsai , Min-Lung Huang , Chia-Ming Chuang
IPC分类号： H01B013/00
CPC分类号： H01L24/13 , H01L24/11 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05572 , H01L2224/1147 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01072 , H01L2924/01078 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2224/05647 , H01L2924/00014 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166
摘要： A method of forming a plurality of bumps over a wafer mainly comprises providing the wafer having a plurality of bonding pads formed thereon, forming an under bump metallurgy (UBM) layer over the bonding pads wherein the UBM layer includes an adhesive layer, for example a titanium (Ti) layer or an aluminum (Al) layer, and at least one electrically conductive layer formed on the adhesive layer, removing the portions of the electrically conductive layer located outside the bonding pads, forming a plurality of bumps over the residual portions of the electrically conductive layer disposed above the bonding pads, etching the adhesive layer located outside the bumps, and then reflowing the bumps.
摘要翻译：在晶片上形成多个凸块的方法主要包括提供具有形成在其上的多个接合焊盘的晶片，在焊盘上形成凸块下的金属（UBM）层，其中UBM层包括粘合剂层，例如钛（Ti）层或铝（Al）层，以及形成在粘合剂层上的至少一个导电层，去除位于接合焊盘外部的导电层的部分，在焊盘的剩余部分上形成多个凸块所述导电层设置在所述接合焊盘之上，蚀刻位于所述凸块之外的所述粘合剂层，然后回流所述凸块。

4. 发明申请

US20040182815A1 Method of trench isolation and method for manufacturing a non-volatile memory device using the same 有权
标题翻译：沟槽隔离方法以及使用其的非易失性存储器件的制造方法
公开(公告)号：US20040182815A1
公开(公告)日：2004-09-23
申请号：US10784326
申请日：2004-02-23
申请人： Samsung Electronic Co. Ltd.
发明人： Sang-Hoon Lee , Hun-Hyeoung Leam , Seung-Mok Shin , Woo-Sung Lee
IPC分类号： H01B013/00
CPC分类号： H01L21/76224
摘要： In accordance with a method of trench isolation, a first oxide layer is formed on a semiconductor substrate. A first conductive layer and a nitride layer are successively formed on the first oxide layer. The nitride layer, the first conductive layer and the first oxide layer are etched to form a nitride layer pattern, a first conductive layer pattern and an oxide layer pattern. A portion of the substrate adjacent to the first conductive layer pattern is etched to form a trench in the substrate. The trench is cured under dinitrogen monoxide (N2O) or nitrogen monoxide(NO) atmosphere. A second oxide layer is formed in the trench through an in-situ process.
摘要翻译：根据沟槽隔离的方法，在半导体衬底上形成第一氧化物层。第一导电层和氮化物层依次形成在第一氧化物层上。蚀刻氮化物层，第一导电层和第一氧化物层，以形成氮化物层图案，第一导电层图案和氧化物层图案。蚀刻邻近第一导电层图案的衬底的一部分，以在衬底中形成沟槽。沟槽在一氧化二氮（N2O）或一氧化氮（NO）气氛下固化。通过原位工艺在沟槽中形成第二氧化物层。

5. 发明申请

US20040155009A1 Method for manufacturing a probe card 失效
标题翻译：探针卡制造方法
公开(公告)号：US20040155009A1
公开(公告)日：2004-08-12
申请号：US10771876
申请日：2004-02-04
发明人： Koichi Wada , Yasuhiro Maeda
IPC分类号： H01B013/00
CPC分类号： G01R3/00 , G01R1/06711 , G01R1/07342 , Y10T29/49002 , Y10T29/49128 , Y10T29/4913 , Y10T29/49147 , Y10T29/49155 , Y10T29/49169 , Y10T29/49204
摘要： A method for manufacturing a probe card, which includes a contact provided on a base substrate and electrically coupled to a terminal of an electronic device, for receiving and/or sending a signal from and/or to the electronic device, includes a first contact formation step of forming a first contact of the contacts on a first surface of a first sacrificial substrate, a second contact formation step of forming a second contact of the contacts of a first surface of a second sacrificial substrate, a signal transmission line formation step of forming a signal transmission line in the base substrate, a first contact joining step of attaching the first surface of the first sacrificial substrate to the base substrate and joining the first contact to the signal transmission line and a second contact joining step of attaching the first surface of the second sacrificial substrate to the base substrate and joining the second contact to the signal transmission line.
摘要翻译：一种用于制造探针卡的方法，其包括设置在基底基板上并电耦合到电子设备的端子的用于接收和/或发送来自电子设备和/或向电子设备发送信号的接触的方法包括：第一接触形式在第一牺牲衬底的第一表面上形成触点的第一接触的步骤，形成第二牺牲衬底的第一表面的触点的第二接触的第二接触形成步骤，形成第二牺牲衬底的信号传输线形成步骤在所述基底基板中的信号传输线，第一接触接合步骤，将所述第一牺牲基板的第一表面附接到所述基底基板并将所述第一接触接合到所述信号传输线;以及第二接触接合步骤，所述第二牺牲基板到所述基底基板并将所述第二接触件接合到所述信号传输线。

6. 发明申请

US20040134875A1 Circuit-parts sheet and method of producing a multi-layer circuit board 审中-公开
标题翻译：电路部件片和多层电路板的制造方法
公开(公告)号：US20040134875A1
公开(公告)日：2004-07-15
申请号：US10719897
申请日：2003-11-21
申请人： KYOCERA CORPORATION
发明人： Norimitsu Fukami , Shuichi Tateno , Seiichiro Hirahara , Akira Imoto
IPC分类号： H01B013/00
CPC分类号： H05K1/162 , H01L21/4857 , H01L2224/48091 , H01L2224/48227 , H01L2924/01019 , H01L2924/01025 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15153 , H01L2924/1517 , H01L2924/15787 , H01L2924/19041 , H05K1/0306 , H05K3/0023 , H05K3/20 , H05K3/207 , H05K3/4614 , H05K3/4629 , H05K3/4697 , H05K2201/0108 , H05K2201/0187 , H05K2201/09881 , H05K2203/0156 , H05K2203/0551 , H01L2924/00014
摘要： A method of producing a circuit-parts sheet having a structure in which a light-nontransmitting circuit-forming pattern is secured in a photo-cured ceramic sheet and is exposed on both surfaces of said photo-cured ceramic sheet, comprising the steps of: (a) forming the light-nontransmitting conductor pattern on the surface of a light-transmitting film; (b) forming a photo-curable ceramic coating layer by applying a photo-curable slurry onto the surface of the film on which said conductor pattern is formed; (c) forming a photo-cured ceramic sheet by photo-curing said photo-curable ceramic coating layer by the irradiation with light from the back surface of said film; (d) removing uncured portions of said photo-curable ceramic coating layer by using a developing solution; and (e) peeling off said carrier film. Use of this circuit-parts sheet makes it possible to produce a multi-layer circuit board simultaneously satisfying both the requirement for decreasing the thickness of the insulating layers and the requirement of increasing the thickness of the wiring conductor layers.
摘要翻译：一种制造电路部件片的方法，其具有在光固化陶瓷片中固定光不发光电路形成图案并露出在所述光固化陶瓷片的两个表面上的结构，包括以下步骤：（a）在透光膜的表面上形成光不发光导体图案; （b）通过在其上形成有所述导体图案的膜的表面上施加光固化浆料形成光固化陶瓷涂层; （c）通过用所述膜的背面的光照射光固化所述光固化陶瓷涂层来形成光固化陶瓷片; （d）使用显影液除去所述可光固化陶瓷涂层的未固化部分; 和（e）剥离所述载体膜。通过使用该电路部件片，能够同时满足减小绝缘层的厚度的要求和增加布线导体层的厚度的要求而制造多层电路板。

7. 发明申请

US20040124172A1 EXTRUSION-FREE WET CLEANING PROCESS FOR COPPER-DUAL DAMASCENE STRUCTURES 有权
标题翻译：双重DASASCENE结构的无冲洗干净清洗工艺
公开(公告)号：US20040124172A1
公开(公告)日：2004-07-01
申请号：US10707986
申请日：2004-01-29
发明人： Chih-Ning Wu
IPC分类号： H01B013/00
CPC分类号： H01L21/02063 , C23G1/00 , H01L21/32134 , H01L21/76807 , H01L21/76814 , H01L21/76838
摘要： An extrusion-free wet cleaning process for post-etch Cu-dual damascene structures is developed. The process includes the following steps: (1).providing a wafer having a silicon substrate and at least one post-etch Cu-dual damascene structure, the post-etch Cu-dual damascene structure having a via structure exposing a portion of a Cu wiring line electrically connected with an Nnull diffusion region of the silicon substrate, and a trench structure formed on the via structure;(2).applying a diluted H2O2 solution on the wafer to slightly oxidize the surface of the exposed Cu wiring line;(3).washing away cupric oxide generated in the oxidation step by means of an acidic cupric oxide cleaning solution containing diluted HF, NH4F or NH2OH; and (4).providing means for preventing Cu reduction reactions on the Cu wiring line.
摘要翻译：开发了一种用于后蚀刻铜双镶嵌结构的无挤出湿法清洗工艺。该方法包括以下步骤：（1）提供具有硅衬底和至少一个后蚀刻Cu-双镶嵌结构的晶片，所述后蚀刻Cu-双镶嵌结构具有暴露一部分Cu的通孔结构与硅衬底的N +扩散区电连接的布线，以及形成在该通孔结构上的沟槽结构;（2）将稀释的H 2 O 2溶液施加在晶片上以稍微氧化暴露的Cu布线的表面 ;（3）通过含有稀释的HF，NH4F或NH2OH的酸性氧化铜清洗溶液洗涤在氧化步骤中产生的氧化铜; 和（4）用于防止Cu布线上的Cu还原反应的提供装置。

8. 发明申请

US20040080688A1 Manufacturing method of wiring structure, manufacturing method of electro-optic device, electro-optic device, and electronic apparatus 有权
标题翻译：布线结构的制造方法，电光装置的制造方法，电光装置和电子装置
公开(公告)号：US20040080688A1
公开(公告)日：2004-04-29
申请号：US10652511
申请日：2003-09-02
申请人： Seiko Epson Corporation
发明人： Yukimasa Ishida
IPC分类号： H01B013/00 , H01L021/50
CPC分类号： G02F1/133555 , G02F1/1345
摘要： To provide highly reliable wiring and connection terminals of an electro-optic device used as a transflective liquid crystal device or the like. Since sidewalls and a part of an upper surface of a data line 6a are covered with a reflection film 44, a central layer 62 is not etched by an etchant when the reflection film 44 is formed by patterning. In addition, since a transparent conductive film 45 is connected to an upper layer 63 of the data line 6a via a contact hole 44a, the resistance of a connection terminal 90 can be decreased, and superior conduction can be obtained.
摘要翻译：提供用作半透射型液晶装置等的电光装置的高度可靠的布线和连接端子。由于侧壁和数据线6a的上表面的一部分被反射膜44覆盖，当通过图案形成反射膜44时，中心层62不被蚀刻剂蚀刻。此外，由于透明导电膜45经由接触孔44a连接到数据线6a的上层63，所以能够降低连接端子90的电阻，能够获得良好的导通性。

9. 发明申请

US20040035693A1 Method for removing voids in a ceramic substrate 有权
公开(公告)号：US20040035693A1
公开(公告)日：2004-02-26
申请号：US10227969
申请日：2002-08-26
发明人： Shao-Pin Ru
IPC分类号： C03C015/00 , H01B013/00
CPC分类号： H05K3/388 , H05K1/0306 , H05K3/062 , H05K3/108 , H05K3/426 , Y10T29/49165
摘要： A method for removing voids in a ceramic substrate includes steps of preparing a ceramic substrate and defining holes of different dimensions in the ceramic substrate, sputtering a titanium/copper film onto opposite sides of the ceramic substrate, chemical copper plating, forming a dry film onto the ceramic substrate, forming an image, plating copper leads, plating nickel and gold, removing the dry film, and etching titanium/copper.

10. 发明申请

US20040026363A1 Circuit board, circuit board-use member and production method therefor and method of laminating fexible film 失效
标题翻译：电路板，电路板用部件及其制造方法和层压有形薄膜的方法
公开(公告)号：US20040026363A1
公开(公告)日：2004-02-12
申请号：US10450415
申请日：2003-06-13
发明人： Takayoshi Akamatsu , Futoshi Okuyama , Nobuyuki Kuroki , Hiroshi Enomoto , Tetsuya Hayashi , Yoshio Matsuda , Yoichi Shinba , Masahiro Oguni
IPC分类号： H01B013/00 , C23F001/00
CPC分类号： B32B38/18 , B32B37/025 , B32B2037/109 , B32B2038/1891 , B32B2379/08 , B32B2457/08 , H05K1/0393 , H05K3/007 , H05K2203/0152 , H05K2203/0156 , H05K2203/016 , H05K2203/066 , H05K2203/068 , H05K2203/1572 , Y10S428/901 , Y10T428/24917
摘要： The present invention relates to a circuit board including a flexible film provided with an extremely fine circuit pattern, a laminated member for a circuit board, and a method for making a laminated member for a circuit board with excellent productivity. A circuit board of the present invention includes a flexible film and a circuit pattern composed of a metal provided on the flexible film, and dimensional change rate of the circuit pattern is within null0.01%. A laminated member for a circuit board of the present invention includes a reinforcing plate, a self-stick, removable organic layer, a flexible film, and a circuit pattern composed of a metal laminated in that order.
摘要翻译：电路基板技术领域本发明涉及具备极细电路图案的柔性膜，电路基板用层叠体以及生产率优异的电路板用叠层体的方法。本发明的电路板包括柔性膜和由设置在柔性膜上的金属构成的电路图案，电路图案的尺寸变化率在±0.01％以内。本发明的电路基板用层叠体的特征在于，具有加强板，自粘式，可移除有机层，柔性膜，以及由依次层压的金属构成的电路图案。

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